Wireless PHY Design Verification Engineer - San Diego, United States
Originally posted 18 September 2026 by the employer — open 1 day.
About the role
This role involves the design verification of WiFi SoCs, focusing on ensuring first-time-right silicon success through sophisticated testbenches and comprehensive scenarios.
What you'll do
- Verify sophisticated WiFi PHY digital systems covering time/frequency-domain processing, hardware acceleration, calibration engines, and protocol implementation.
- Architect verification strategies for high-rate, low-power, low-latency, and multi-link wireless features.
- Own subsystem verification from test planning through coverage closure.
- Build verification environments, constrained random scenarios, and apply analytics methodologies.
What you'll need
- BS degree and a minimum of 10 years relevant industry experience.
- Track record of several tapeout cycles of sophisticated designs.
- Experience verifying wireless, DSP, or digital communication systems.
- Knowledge of ASIC verification flows with SystemVerilog / UVM including testbench architecture, scenario creation, and coverage-driven methodologies.
- Experience developing verification environments, bringing up complex designs, and debugging simulations.
- Experience with constrained random testing, functional coverage implementation, and assertion-based verification.
Nice to have
- Knowledge of IEEE 802.11 wireless protocols, Bluetooth, Cellular, or similar communication systems.
- Experience with applying / integrating System models utilizing DPIs.
- Understanding of DSP algorithms verification strategies (Bit / Cycle matching, Assertions).
- Experience with transaction-level modeling including packet-based approaches (scoreboarding, protocols).
Skills: SystemVerilog, UVM, testbench, functional coverage, wireless, DSP
This role has been open 1 day — well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1133
|
Median days open
59 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (1133 roles · 93 employers) |
|---|---|---|
| Open roles in this specialty | 34 | 1133 |
| Open roles in the wider Digital Design & Verification family | 75 | 3011 · 114 employers |
| Median days open | 14 d | 59 d (−45 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: SystemVerilog, UVM, testbench, functional coverage, wireless, DSP
Who's hiring in this category
- Qualcomm · 103 open roles · median 54 d
- AMD · 100 open roles · median 32 d
- NVIDIA · 89 open roles · median 66 d
- Synopsys · 58 open roles · median 21 d
- Micron Technology · 56 open roles · median 99 d
- SiFive · 52 open roles · median 47 d
How we counted: 1133 open Design Verification (Design Verification) roles from 93 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.