Originally posted 11 September 2026 by the employer — open 0 days.
About the role
This role is responsible for driving the test, technology, and operations strategy and execution for design for test (DFT), test automation, automated test equipment (ATE) and reliability hardware, new product introduction (NPI), COGs, factory transfers, quality and EFARs, and sustaining activities.
What you'll do
- Lead the centralized TTO Engineering organization across Allen, Bangalore, Czech Republic, and Philippines.
- Own the strategy and execution for DFT, test automation, ATE and reliability hardware, NPI readiness, COGs improvement, factory transfers, quality and EFARs, and sustaining support.
- Define and drive the overall TTO Engineering strategy across design for test, test automation, ATE and reliability hardware, NPI, COGs, factory transfers, quality and EFARs, and sustaining.
- Lead centralized test technology development and standardization to improve execution efficiency, test coverage, final test yield, product quality, and cost performance.
- Oversee ATE and reliability hardware strategy, capability planning, deployment readiness, and sustaining support across product lifecycles.
- Drive COGs improvement initiatives through test cost reduction, yield enhancement, process optimization, and disciplined operational execution.
What you'll need
- Degree in Electrical Engineering or an equivalent engineering discipline.
- 20+ years of direct leadership experience in product and test engineering.
Nice to have
- Executive-level leadership experience.
- Experience building teams and developing talent.
- Able to work effectively across functional organizations at senior levels of management.
- Strong problem-solving methodology.
- Strategic mindset.
- Effective communication skills.
This role has been open 0 days — well below the 23-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
307
|
Median days open
23 d
|
Median salary
$154k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (307 roles · 64 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 307 |
| Open roles in the wider Silicon Validation & Test family | 69 | 1956 · 110 employers |
| Median days open | 19 d | 23 d (−4 d vs this employer) |
| Median salary (USD postings) | — | $154k |
Who's hiring in this category
- Infineon Technologies · 31 open roles · median 20 d
- Renesas Electronics · 30 open roles · median 26 d
- Qualcomm · 19 open roles · median 22 d
- AMD · 18 open roles · median 22 d
- Micron Technology · 18 open roles · median 18 d
- NVIDIA · 15 open roles · median 16 d
How we counted: 307 open Silicon Test Engineering (DFT Test) roles from 64 employers tracked in the SemiconductorJobs index, counted 11 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.