VLSI Physical Design CAD Intern - Summer 2027 - Hsinchu, Taiwan
Originally posted 15 September 2026 by the employer — open 5 days.
About the role
This internship involves developing tools and solutions for NVIDIA's VLSI Physical Design flow.
What you'll do
- Develop in-house tools and solutions.
- Automate VLSI Physical Design flow.
- Improve quality control of VLSI Physical Design flow.
- Enhance performance of VLSI Physical Design flow.
- Work with EDA vendors on tools evaluation and improvement.
What you'll need
- Pursuing MS/PhD in CS/EE.
- Basic knowledge of device model in chip design.
- Basic knowledge of processing technology in chip design.
- Basic knowledge of timing in chip design.
- Basic knowledge of noise in chip design.
- Basic knowledge of power in chip design.
Nice to have
- Proficient user of C/C++/Python/Perl.
- Analytical ability on placement, routing, timing, clock, power, noise and DFM.
- Experience on Mathematical algorithm for VLSI CAD.
- Experience on data structure for VLSI CAD.
- Hands-on background in EDA software from Synopsys (DC/ICC2/STAR-RC/PT/ICV).
- Hands-on background in EDA software from Cadence (Genus/Innovus/Quantus/Tempus/PVS).
- Hands-on background in EDA software from ANSYS (Seahawk/Redhawk).
- Hands-on experiences in DL/ML projects/programs.
Skills: VLSI Physical Design, CAD, flow automation, EDA vendors, Synopsys, Cadence
This role has been open 5 days — well below the 86-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
668
|
Median days open
86 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (668 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 46 | 668 |
| Open roles in the wider Physical Implementation family | 92 | 1373 · 107 employers |
| Median days open | 65 d | 86 d (−21 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: VLSI Physical Design, CAD, flow automation, EDA vendors, Synopsys, Cadence
Who's hiring in this category
- Cadence Design Systems · 168 open roles · median 148 d
- Synopsys · 55 open roles · median 59 d
- NVIDIA (this employer) · 46 open roles · median 64 d
- Micron Technology · 35 open roles · median 121 d
- Qualcomm · 34 open roles · median 72 d
- Intel Corporation · 29 open roles · median 25 d
How we counted: 668 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.