VLSI Design Engineer - Austin, Texas, United States
Originally posted 5 August 2026 by the employer.
About the role
As a VLSI Design Engineer, you will translate high-level algorithmic requirements into hardware implementations for communication systems from scratch.
What you'll do
- Define micro-architecture and write synthesis-friendly, timing-aware RTL using Verilog and SystemVerilog. - Interpret and apply communication protocol specifications such as Ethernet into hardware designs. - Collaborate cross-functionally with verification, DFT, and backend/physical design teams on testbenches, ATPG, BIST, floorplanning, and timing closure. - Generate synthesis constraints (SDC), run synthesis, and analyze timing reports to optimize for area, power, and performance (PPA). - Debug pre-silicon and post-silicon functional and timing issues using waveforms, assertions, and logic analyzers. - Integrate design blocks into larger systems and maintain micro-architecture specifications and interface documentation.
What you'll need
- Experience in micro-architecture definition and RTL coding using Verilog or SystemVerilog. - Experience with synthesis constraints (SDC), synthesis runs, and timing analysis. - Understanding of protocol specifications such as Ethernet. - Experience collaborating on DFT requirements including scan insertion, ATPG, and BIST. - Proficiency in debugging functional and timing issues using waveforms and assertions.
Nice to have
- Experience supporting first silicon bring-up and post-silicon validation. - Familiarity with CDC, linting, or formal verification methodologies and EDA tools.
Skills: RTL coding, Verilog/SystemVerilog, synthesis, micro-architecture, timing analysis
This role has been open 88 days — well above the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1036
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Retym | All employers we track in this specialty (1036 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 1036 |
| Open roles in the wider Digital Design & Verification family | 16 | 3224 · 116 employers |
| Median days open | 88 d | 61 d (+27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL coding, Verilog/SystemVerilog, synthesis, micro-architecture, timing analysis
Who's hiring in this category
- Qualcomm · 140 open roles · median 65 d
- Synopsys · 86 open roles · median 33 d
- AMD · 71 open roles · median 39 d
- Analog Devices · 47 open roles · median 51 d
- NVIDIA · 42 open roles · median 61 d
- NXP Semiconductors · 42 open roles · median 87 d
How we counted: 1036 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.