$115,600 - $173,400 USD yearly
Originally posted 27 February 2026 by the employer.
Verify Qualcomm's DSP and coprocessor targeting AI/ML solutions using SystemVerilog and UVM.
About the role
Qualcomm is seeking a Hardware Verification Engineer to verify complex digital designs. The role focuses on verifying Qualcomm's DSP and coprocessor targeting AI/ML solutions.
What you'll do
- Develop and implement test benches using SystemVerilog and UVM. - Design and execute verification plans based on design specifications and architecture documents. - Apply Object-Oriented Design (OOD) principles to build scalable and reusable verification components. - Collaborate with cross-functional teams to define test strategies and ensure comprehensive coverage. - Write and maintain scripts in Python, Perl, or Shell to automate verification flows. - Debug and resolve complex issues in simulation and emulation environments.
What you'll need
- Bachelor's degree in Science, Engineering, or a related field with 2+ years of ASIC design, verification, validation, integration, or related experience (or Master's degree with 1+ year, or PhD). - Proficiency in SystemVerilog and UVM methodology. - Strong understanding of Object-Oriented Programming (OOP) and test bench architecture. - Experience with scripting languages such as Python, Perl, or Shell. - Solid grasp of computer architecture and digital design fundamentals.
Nice to have
- Experience with formal verification or emulation platforms. - Familiarity with version control systems such as Git. - Exposure to SoC-level verification and constrained-random testing.
Skills: SystemVerilog, UVM, test benches, verification plans, scripting (Python, Perl, Shell)
This role has been open 200 days — well above the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1259
|
Median days open
65 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1259 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 118 | 1259 |
| Open roles in the wider Digital Design & Verification family | 420 | 3310 · 115 employers |
| Median days open | 45 d | 65 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SystemVerilog, UVM, test benches, verification plans, scripting (Python, Perl, Shell)
Who's hiring in this category
- Qualcomm (this employer) · 120 open roles · median 44 d
- NVIDIA · 93 open roles · median 65 d
- AMD · 92 open roles · median 54 d
- Synopsys · 65 open roles · median 40 d
- SiFive · 55 open roles · median 82 d
- Cadence Design Systems · 52 open roles · median 124 d
How we counted: 1259 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.