UCIe Applications Engineering Architect
Originally posted 23 April 2026 by the employer. Relisted by the employer on 29 September 2026.
Architect customer integration and silicon bring-up for Synopsys UCIe interface IP.
About the role
Synopsys is seeking a UCIe Applications Engineering Architect to serve as a technical lead guiding customer integration of interface IP into SOC designs. The role focuses on customer-facing technical engagements, silicon bring-up, and integration architecture for Synopsys UCIe IP across advanced packaging and process nodes.
What you'll do
- Lead customer-facing engagements to architect and guide the integration of Synopsys UCIe IP into SOC designs. - Provide expert-level guidance across front-end and back-end design phases, including validation, synthesis, DFT/ATE, signal and power integrity, and physical design. - Lead complex technical debug sessions addressing design, timing, and power issues during customer implementation. - Drive tape-out and silicon bring-up by analyzing silicon data, correlating pre-silicon models with post-silicon performance, and determining root causes of anomalies. - Develop and utilize scripts and tools in Python, Perl, or TCL for automated silicon testing and post-silicon validation data analysis. - Create technical collateral, application notes, and training materials to enable customer teams and mentor intermediate applications engineers.
What you'll need
- BSc or MSc in Electrical Engineering or a related field. - 15+ years of experience in SOC design, implementation, or applications, with multiple successful tape-outs. - Hands-on expertise in silicon bring-up, characterization, debug, and correlation of pre- and post-silicon data. - Strong command of industry-standard interfaces and protocols, including PCIe/CXL, DDR, UCIe, and AMBA. - Proficiency in scripting languages such as Python, Perl, and TCL for automation and data analysis. - Deep knowledge of EDA tools, specifically in P&R, Physical Verification, and Signal/Power Integrity domains. - Experience in customer-facing technical roles or mentoring engineering teams.
Nice to have
- PhD in Electrical Engineering or a related field. - Familiarity with advanced technology processes (7nm/5nm/3nm), mixed-signal IP, and 2.5D/3D IC packaging.
Skills: UCIe, SOC design, ASIC development, silicon bring-up, interface IP