Test Engineer | ASC INT Logic - Dallas, TX, United States
Originally posted 28 September 2026 by the employer.
This role focuses on Test Engineering for Texas Instruments' new family of Programmable Logic Devices (TPLD).
About the role
This role involves Test Engineering contributions to bring a new family of Analog & Digital Programmable Logic Devices to life, specifically focusing on TI’s new family of Programmable Logic devices (TPLD) which encompass Precision Analog, Mixed Signal, Non-Volatile Memory & Digital Core.
What you'll do
- Define efficient test strategy for product families with heavy re-usability.
- Work with design and systems teams to understand device specifications and product testability.
- Define the DFT strategy for best Test Cost.
- Design ATE hardware boards for package and probe test solutions.
- Generate test plans and execute them to create qual, char and production test programs on ATE platforms.
- Analyze silicon results and debug silicon and test issues.
What you'll need
- Bachelor in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering.
- 3+ years of experience as Test Engineer with ATE experience on J750HD, Teradyne Eagle or equivalent ATE.
- Prior board design experience, preferably for ATE boards.
- Strong technical knowledge of electronic devices and circuits.
- Data analysis skills using Spotfire or equivalent tool.
- Strong verbal and written communication skills.
Nice to have
- Proficiency in IGXL Test Platforms (J750HD, iFlex, UltraFlex).
- Proficiency in programming/scripting in C++, Python.
- Experience with NVM test & device trimming.
- Revision control tools experience: Subversion, Git.
This role has been open 11 days — well below the 25-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
526
|
Median days open
25 d
|
Median salary
$169k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Texas Instruments | All employers we track in this specialty (526 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 22 | 526 |
| Open roles in the wider Silicon Validation & Test family | 98 | 2196 · 111 employers |
| Median days open | 19 d | 25 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $169k |
Who's hiring in this category
- Teradyne · 68 open roles · median 22 d
- Renesas Electronics · 39 open roles · median 25 d
- Infineon Technologies · 38 open roles · median 34 d
- AMD · 28 open roles · median 37 d
- Micron Technology · 28 open roles · median 31 d
- Qualcomm · 25 open roles · median 24 d
How we counted: 526 open Silicon Test Engineering (DFT Test) roles from 75 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.