Technology Development Process Engineer (Hybrid Bonding & Advanced Packaging) - SGP, Singapore
Originally posted 17 September 2026 by the employer — open 3 days.
About the role
This role focuses on designing and optimizing manufacturing processes for advanced packaging technologies, with a specific emphasis on Hybrid Bonding solutions for Logic, Memory, and 3D heterogeneous integration applications.
What you'll do
- Develop and optimize end-to-end Hybrid Bonding processes, including wafer/die surface preparation, wet and dry cleaning, plasma activation, dielectric-to-dielectric bonding, Cu-Cu direct bonding, and post-bond annealing.
- Design and execute process characterization and DOE studies to establish process windows and improve critical metrics.
- Investigate and resolve process integration challenges related to CMP surface topography, surface chemistry, contamination control, thermal budget, and bonding defectivity through data-driven root cause analysis.
- Collaborate with equipment, materials, metrology, and integration teams to develop scalable solutions for die-to-wafer (D2W) Hybrid Bonding applications supporting HBM, Logic, and 3D heterogeneous integration technologies.
- Define and implement characterization methodologies using optical inspection, IR imaging, SEM, AFM, XPS, contact angle measurement, electrical test, and reliability evaluation.
- Generate technical reports, patents, publications, and technology roadmaps.
What you'll need
- Bachelor's, Master's, or PhD in Engineering, Materials Science, Physics, or related disciplines.
- Minimum 5 years of semiconductor experience in technology development, process integration, or advanced packaging.
- Hands-on experience in one or more of the following: Advanced Packaging, Hybrid Bonding, CMP, Plasma Processing, Wet Cleaning, TSV Integration, Process Integration.
Nice to have
- Strong understanding of Hybrid Bonding mechanisms and package integration flows.
- Experience with DOE, JMP/Minitab, and statistical process analysis.
- Knowledge of reliability, failure analysis, and advanced metrology techniques.
This role has been open 3 days — well below the 57-day median for Process Integration roles.
Process Integration · Advanced Packaging
|
Open roles in category
69
|
Median days open
57 d
|
Median salary
$175k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Applied Materials | All employers we track in this specialty (69 roles · 20 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 69 |
| Open roles in the wider Process, Fab & Equipment family | 1078 | 9314 · 108 employers |
| Median days open | 26 d | 57 d (−31 d vs this employer) |
| Median salary (USD postings) | — | $175k |
Who's hiring in this category
- Micron Technology · 13 open roles · median 103 d
- GlobalFoundries · 10 open roles · median 89 d
- Intel Corporation · 10 open roles · median 29 d
- Applied Materials (this employer) · 8 open roles · median 26 d
- Renesas Electronics · 5 open roles · median 65 d
- Lumilens · 4 open roles · median 44 d
How we counted: 69 open Process Integration (Advanced Packaging) roles from 20 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.