Technical Program Manager-Post Silicon Development - CA, San Jose, United States
Verification, Validation & Test
Originally posted 16 October 2026 by the employer.
About the role
This role involves managing a Silicon Engineering group and innovating with internal teams and external partners to create computing technologies.
What you'll do
- Manage projects of significant technical importance that cross engineering project areas.
- Initiate changes to existing processes and methods to improve project and team efficiency.
- Identify action or mitigation plans for issues or risks during the project lifecycle.
- Collaborate with core teams and execution teams to identify areas requiring special attention or escalations.
- Facilitate closure of complex issues requiring multi-party alignment of AMD teams, customers, and partners.
- Manage and handle issues and escalations with a sense of urgency.
What you'll need
- Thorough knowledge of FPGA based ASIC design cycle, validation requirements, software requirements and Vivado flows.
- Knowledge of the principles of project management.
- Ability to get results in a large organization matrix.
- Bachelor's or Master's Degree in Electrical Engineering, Computer Science, or similar.
Nice to have
- Experience in managing and working with diverse cross functional teams across geographies that include SW, HW, Firmware, Validation, Verification, Marketing, Customer Support, Sales teams.
- Experience in managing complex, interrelated ASIC projects, programs, and functions.
- Knowledge of Jira, Confluence, Microsoft Office Suite.
Market context
This role has been open 0 days — well below the 64-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
118
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (118 roles · 30 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 118 |
| Open roles in the wider Silicon Validation & Test family | 149 | 2226 · 113 employers |
| Median days open | 54 d | 64 d (−10 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 19 open roles · median 37 d
- AMD (this employer) · 15 open roles · median 63 d
- NVIDIA · 15 open roles · median 70 d
- Graphcore · 10 open roles · median 121 d
- Amazon · 6 open roles · median 40 d
- Micron Technology · 5 open roles · median 211 d
How we counted: 118 open Post-Silicon Validation (Design Verification) roles from 30 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.