Tech Lead Optical Test Engineer - San Jose, California, United States
$133,200 - $185,000 USD yearly
Originally posted 3 August 2026 by the employer.
Astera Labs provides connectivity solutions including CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies.
About the role
As a Tech Lead Optical Test Engineer, you will contribute to the development and deployment of optical test solutions for silicon photonics devices and optical modules. This role supports the definition of test methodologies, drives key portions of test development, and leads technical efforts within the broader test organization for CPO components and assemblies.
What you'll do
- Define and implement optical test architectures and test flows across optical wafer probe test, package level test & characterization, and optical module validation.
- Perform high-speed optical measurements including insertion loss, return loss, extinction ratio, eye diagram analysis, BER testing, and optical modulation amplitude (OMA).
- Characterize optical performance parameters such as wavelength accuracy, channel spacing, spectral linearity, and crosstalk for WDM-based CPO architectures.
- Design and build optical test stations incorporating fiber alignment systems, optical switches, tunable lasers, optical spectrum analyzers, high-speed oscilloscopes, and BER testers.
- Develop test automation software, automated test scripts & frameworks using Python, LabVIEW, MATLAB, or similar platforms.
- Analyze large-scale optical test data to identify trends, failure modes, and yield-limiting factors, and generate statistical reports (Cpk, GR&R, SPC).
What you'll need
- M.S. or Ph.D. in Electrical Engineering, Optical Engineering, Physics, or Photonics.
- 5–7+ years of experience in optical testing, photonic device characterization, or optical transceiver development.
- Strong understanding of silicon photonics devices (modulators, photodetectors, multiplexers, grating couplers, edge couplers).
- Hands-on experience with optical test equipment: OSA, OMA, tunable lasers, polarization controllers, power meters, high-speed real-time oscilloscopes, BERT/pattern generators.
- Proficiency in high-speed optical link testing (100G/lane and above, PAM4, NRZ).
- Programming skills in Python, MATLAB, LabVIEW, or C/C++ for test automation.
- Knowledge of optical communication standards (IEEE 802.3, OIF-CEI, CMIS).
Nice to have
- Participate in design reviews to ensure testability and provide DFT (Design for Test) recommendations.
Skills: RTL design, Verilog, SystemVerilog, synthesis, PCIe, CXL
This role has been open 56 days — below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
986
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (986 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 25 | 986 |
| Open roles in the wider Digital Design & Verification family | 58 | 3109 · 115 employers |
| Median days open | 19 d | 62 d (−43 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL design, Verilog, SystemVerilog, synthesis, PCIe, CXL
Who's hiring in this category
- Qualcomm · 141 open roles · median 62 d
- AMD · 68 open roles · median 65 d
- Synopsys · 65 open roles · median 24 d
- NXP Semiconductors · 54 open roles · median 72 d
- NVIDIA · 47 open roles · median 53 d
- Analog Devices · 46 open roles · median 37 d
How we counted: 986 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.