Originally posted 20 August 2026 by the employer.
About the role
This role involves validating power management solutions, including multiphase digital controllers, Smart Power Stages (SPS), SmartFET, eFuse, Gate Driver devices, and associated power-delivery systems.
What you'll do
- Develop and execute comprehensive system validation plans covering functional, electrical, system, reliability, and application-level requirements.
- Design and implement validation methodologies, measurement techniques, and test systems for new product development.
- Perform hands-on laboratory validation, characterization, and debug of silicon and system platforms.
- Develop automated test solutions using Python, LabVIEW, or similar software tools.
- Validate product functionality, protection features, telemetry, comms interfaces, power sequencing, fault handling, and system performance.
- Analyze validation data, identify root causes, and work closely with Design, Product Engineering, Applications, Firmware, and ATE teams to resolve issues.
What you'll need
- Bachelor's or Master's Degree in Electronic Engineering, Electrical Engineering, Computer Engineering, or a related discipline.
- 8–12 years of relevant industry experience in semiconductor, power electronics, system validation, or hardware development.
- Strong understanding of analog and digital circuit fundamentals.
- Experience using laboratory equipment such as: Oscilloscopes, Electronic loads, Logic analyzers, Signal and spectrum analyzers.
- Experience troubleshooting complex hardware and silicon-related issues.
Nice to have
- System-level validation of Multiphase power controllers, Digital VR controllers, Smart Power Stages (SPS), POL (Point-of-Load) regulators, PMIC products.
- Power conversion topologies including Buck, Multiphase Buck, and TLVR architectures.
- Validation of CPU/GPU power delivery solutions.
- Functional Safety, ISO 26262, ISO 21780, SiC/GaN.
- AI-assisted validation experience.
- Test automation using Python, LabVIEW, C/C++, or similar languages.
- FPGA-based validation and emulation.
- Familiarity with Jama, Jira, and Confluence.
- PCB design and schematic review experience.
- Validation planning, compliance testing, characterization, and correlation methodologies.
This role has been open 38 days — well above the 25-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
472
|
Median days open
25 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (472 roles · 72 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 472 |
| Open roles in the wider Silicon Validation & Test family | 75 | 2149 · 110 employers |
| Median days open | 26 d | 25 d (+1 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Teradyne · 50 open roles · median 10 d
- Infineon Technologies · 37 open roles · median 32 d
- Renesas Electronics · 33 open roles · median 28 d
- AMD · 26 open roles · median 26 d
- Micron Technology · 25 open roles · median 28 d
- Qualcomm · 25 open roles · median 13 d
How we counted: 472 open Silicon Test Engineering (DFT Test) roles from 72 employers tracked in the SemiconductorJobs index, counted 28 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.