System Modeling (Performance Models)
Originally posted April 3, 2026 by the employer. Relisted by the employer on November 14, 2026.
About the role
As a Member of Technical Staff, System Modeling (Performance Models), you will build simulation frameworks that enable evaluation and rapid iteration across all layers of unconventional physics-based computing systems for machine learning workloads.
What you'll do
- Build extensible and composable high-fidelity power, performance, and area estimation tools for AI acceleration system architectures to enable rapid design space exploration.
- Define and create comparative analyses across candidate architectures and existing implementations.
- Collaborate with other engineering teams to support high-level system design and lower-level hardware verification through modeling and simulation.
What you'll need
- MS or PhD in a quantitative field (AI/ML, Computer Science, Physics, Electrical Engineering, Applied Math), or a BS with substantial equivalent research and engineering depth.
- Experience with tools and development for power profiling, modeling, and simulation for AI workloads.
- Deep understanding of spatial architectures, data orchestration mechanisms, and dataflow strategies including Weight-Stationary (WS), Output-Stationary (OS), Input-Stationary (IS), and Row-Stationary (RS).
- Familiarity with hardware accelerator design tools such as TimLoop, Accelergy, NeuroSim, CIMLoop, or CACTI.
- Familiarity with existing systolic array accelerator architectures for AI/ML workloads.
- Solid understanding of modern AI/ML architectures, training/inference workflows, and strong experience implementing and debugging ML models in PyTorch or similar frameworks.
Nice to have
- Basic familiarity with analog dynamic systems, including transient responses, nonlinearity, quantization, random noise, and feedback/stability.
- Python engineering skills covering modular design, testing, packaging, and CI.
- Experience with PyTorch internals (autograd, custom modules, low-level ops) and familiarity with torch.compile or similar graph capture/compile flows.
- Experience with CUDA, Triton, or other GPU programming approaches, including custom kernels, memory hierarchy analysis, and performance tuning.
- Familiarity with tools such as JAX, NumPy, TensorFlow, Modal, HPC patterns (MPI, NCCL, distributed training), or SciPy.
- Experience applying efficiency techniques such as quantization, sparsity, pruning, distillation, or kernel fusion.
- Prior experience building or extending a simulation or modeling framework across ML systems, physics, or circuits.
Skills: system modeling, performance models, architecture
More semiconductor jobs: SoC design jobs
First seen in our index 110 days ago, well above the 72-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
520
|
Median days since first seen
72 d
|
Category median salary (all employers)
$228k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Unconventional AI | All employers we track in this specialty (520 roles · 70 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 520 |
| Open roles in the wider Digital Design & Verification family | 7 | 3639 · 123 employers |
| Median days since first seen | 110 d | 72 d (−38 d vs this employer) |
| Median salary (USD postings) | n/a | $228k |
Skills observed across this category: system modeling, performance models, architecture
Who's hiring in this category
- Qualcomm · 92 open roles · median 73 d
- NVIDIA · 69 open roles · median 86 d
- AMD · 41 open roles · median 72 d
- Apple · 40 open roles · median 14 d
- Arm Holdings · 28 open roles · median 17 d
- Micron Technology · 21 open roles · median 113 d
How we counted: 520 open SoC/Chip Architecture (SOC Architecture) roles from 70 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.