Student Signal and Power Integrity Engineer - Haifa, Israel
Originally posted 17 July 2026 by the employer — open 55 days.
About the role
This role involves supporting the integration of mixed-signal and high-speed SERDES IPs into full-chip silicon designs, packages, and PCBs within the SERDES Analog team.
What you'll do
- Support SERDES IP system simulation, including reference channel definition, creation, and parameter extraction.
- Review and validate Silicon IP parameters in conjunction with package and PCB designs according to interface specifications.
- Participate in package and PCB schematics and layouts review, analyze simulation results, and assist in debugging simulation failures.
- Apply Signal and Power Integrity environment concepts, including SIPI circuits, channels, and IOs simulation.
- Support optimization efforts to meet power, performance, and signal integrity requirements for package and PCB designs.
- Collaborate with internal teams to ensure successful IP, package, and PCB integration and high-quality design delivery.
What you'll need
- B.Sc or M.Sc in Electrical Engineering with one year until graduation.
- Strong background in electromagnetic and waves theory of physics.
- Ability to study and implement learned material and theory in multidisciplinary domains: Analog and Digital Electronics, Signal and Power Integrity.
- Academic grades sheet included with the application.
Nice to have
- Basic or deep knowledge in Keysight ADS and HSPICE simulation setup creation and running.
- Basic or deep hands-on experience in Ansys HFSS, Cadence Clarity, or similar Electromagnetic Simulation tools.
- Basic or deep knowledge of the PCIe and IEEE Ethernet specification.
Skills: SERDES, Signal Integrity, Power Integrity, Mixed-Signal, PCIe, IEEE Ethernet
This role has been open 55 days — well below the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 5 | 217 |
| Median days open | 57 d | 91 d (−34 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SERDES, Signal Integrity, Power Integrity, Mixed-Signal, PCIe, IEEE Ethernet
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.