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NXP Semiconductors

Stage Ingénieur : L'IA appliquée à l'implémentation physique des circuits numériques (F/H) - France

NXP Semiconductors 2 Locations, France Internship 1 month ago
Physical Design & EDA

Originally posted 16 September 2026 by the employer.

About the role

This internship focuses on the application of AI technologies to the physical implementation of 16nm SoCs.

What you'll do

  • Study and evaluate the contribution of AI technologies in the design and physical implementation of digital integrated circuits.
  • Identify relevant use cases and assess potential gains on real team projects.
  • Develop AI-based design-assistance tools.
  • Analyze and use data generated by EDA tools.
  • Explore Machine Learning techniques applied to SoC design challenges.

What you'll need

  • Final year of a Master's-level engineering degree in microelectronics or integrated circuit design.
  • Interest in AI technologies and complex digital systems.
  • Good level of written and spoken English.

Skills: physical implementation, SoC, AI technologies, EDA tools, Machine Learning

Market context

This role has been open 40 days — slightly above the 33-day median for EDA/CAD Engineering roles.

EDA/CAD Engineering · AI EDA Design

Open roles in category
72
Median days open
33 d
Median salary
$209k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NXP Semiconductors compares in EDA/CAD Engineering hiring
Metric NXP Semiconductors All employers we track in this specialty (72 roles · 25 employers)
Open roles in this specialty 11 72
Open roles in the wider Physical Implementation family 47 1507 · 111 employers
Median days open 82 d 33 d (+49 d vs this employer)
Median salary (USD postings) — $209k

Skills observed across this category: physical implementation, SoC, AI technologies, EDA tools, Machine Learning

Who's hiring in this category

  • NXP Semiconductors (this employer) · 12 open roles · median 75 d
  • NVIDIA · 8 open roles · median 33 d
  • Keysight Technologies · 7 open roles · median 27 d
  • Synopsys · 6 open roles · median 10 d
  • Cadence Design Systems · 5 open roles · median 80 d
  • Qualcomm · 4 open roles · median 27 d

How we counted: 72 open EDA/CAD Engineering (AI EDA Design) roles from 25 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Apply now
2 Locations, France
On-site
Internship
1 month ago

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