Stage Ingénieur : Automatisation de la génération et de la maintenance de modèles AMS à l’aide de l’IA (F/H)
Originally posted 5 October 2026 by the employer.
About the role
This intern role focuses on improving innovative AMS verification methodologies for integrated Analog and Mixed Signal (AMS) circuits for automotive applications.
What you'll do
- Study existing AMS modeling methodologies and analyze legacy behavioral models.
- Develop AI-assisted Python scripts to automatically migrate and update legacy models.
- Build and enrich a "Golden Library" of reference models covering analog and mixed-signal functions.
- Define modeling guidelines and best practices based on developed reference models.
- Develop and experiment with AI agents capable of automatically generating AMS models from circuit descriptions or Verilog-AMS netlists.
What you'll need
- Master's degree, final year of an engineering school specializing in electronics.
- Knowledge of digital and analog electronic circuits design.
- Knowledge of modeling analog blocks using Verilog-A, Verilog-AMS, or SystemVerilog.
- Good verbal and written communication skills in both French and English.
Nice to have
- Proficiency with one or more EDA tools: Cadence Virtuoso, Cadence Xcelium.
- Experience using generative AI tools.
Skills: AMS modeling, AI-assisted Python scripts, generative AI, Verilog-AMS, Cadence Virtuoso
This role has been open 0 days — well below the 45-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
60
|
Median days open
45 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (60 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 60 |
| Open roles in the wider Physical Implementation family | 44 | 1430 · 108 employers |
| Median days open | 47 d | 45 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: AMS modeling, AI-assisted Python scripts, generative AI, Verilog-AMS, Cadence Virtuoso
Who's hiring in this category
- NXP Semiconductors (this employer) · 13 open roles · median 47 d
- Cadence Design Systems · 7 open roles · median 27 d
- Keysight Technologies · 7 open roles · median 6 d
- NVIDIA · 6 open roles · median 28 d
- Qualcomm · 3 open roles · median 43 d
- AMD · 2 open roles · median 40 d
How we counted: 60 open EDA/CAD Engineering (AI EDA Design) roles from 23 employers tracked in the SemiconductorJobs index, counted 6 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.