Staff Test Engineer, Hardware Security
$134,800 - $202,200 USD yearly
Originally posted 28 May 2026 by the employer. Relisted by the employer on 8 August 2026.
About the role
Product and Test Engineering (PTE) is looking for a Digital Test Engineer to create test solutions in support of New Product Introduction (Silicon Validation and Characterization) and Manufacturing Enablement of Qualcomm Silicon on Chip (SOC) products. The role spans IP test development, DFT/DFM yield management and diagnostics, AI/ML-driven ATE test models, and adjacent disciplines like 2.5D/3D IC and photonic integrated circuits testing.
What you'll do
- Create test solutions supporting New Product Introduction silicon validation, characterization, and manufacturing enablement for SOC products. - Develop test coverage across microprocessors, HSIO, logic, and memory IP. - Drive DFT/DFM initiatives including yield management, diagnostics, and test time reduction. - Develop software, algorithmic models, and ATE test implementations utilizing AI and machine learning techniques. - Collaborate with packaging teams on 2.5D/3D IC testing, thermal test analysis, photonic integrated circuits (PICs), and integrated RF/photonic devices.
What you'll need
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience (or Master's with 3+ years, or PhD with 2+ years). - Knowledge of Python, Java, and Linux. - Experience working with common test equipment including oscilloscopes, spectrum analyzers, logic analyzers, and network analyzers. - Knowledge of signal integrity and transmission line theory.
Nice to have
- 1-2+ years of industry experience on Advantest 93K or Teradyne UFlex/IFlex as a Product, Test Engineer, or Manufacturing Engineer. - FPGA programming and embedded software development for optical subsystem prototyping. - Experience with active and passive photonic devices including semiconductor lasers, Mach-Zehnder Modulators (MZMs), photodiodes, and waveguide-based devices. - Understanding of optical communication system metrics including OSNR, receiver sensitivity, optical modulation index, and optical filtering. - Industrial experience supporting high-volume production of semiconductor devices and EIC/PIC products. - Master's or PhD degree in Electrical Engineering or Optics.
This role has been open 148 days — well above the 36-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
564
|
Median days open
36 d
|
Median salary
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (564 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 31 | 564 |
| Open roles in the wider Silicon Validation & Test family | 138 | 2238 · 112 employers |
| Median days open | 36 d | 36 d (same as this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 75 open roles · median 28 d
- Infineon Technologies · 46 open roles · median 40 d
- Renesas Electronics · 44 open roles · median 30 d
- Qualcomm (this employer) · 31 open roles · median 36 d
- Texas Instruments · 29 open roles · median 31 d
- Micron Technology · 28 open roles · median 40 d
How we counted: 564 open Silicon Test Engineering (DFT Test) roles from 78 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.