Staff Test Engineer - Automated Test Equipment - TX, Austin, United States
Originally posted 18 August 2026 by the employer.
About the role
As a Staff Test Engineer, you will join a Test Engineering team focused on the quality, cost, and time-to-market of AMD microprocessors. You will work across the product lifecycle, from pre-silicon product features to post-silicon debug and characterization.
What you'll do
- Deliver product test solutions consisting of hardware, software, and test content.
- Complete post-silicon characterization, product definition, and performance optimization.
- Optimize product cost structure, including yield, test hardware costs, and test costs.
- Collaborate with hardware design engineers to establish specifications for production test and debug infrastructure.
- Identify thermal and electrical design requirements for SoC products and develop optimized test programs.
- Collect and analyze data to facilitate engineering decisions during silicon hardware development.
- Validate ATE hardware and software systems and troubleshoot issues.
What you'll need
- Accountability for quality and timeliness of outcomes within assigned projects.
- Problem-solving abilities using standard engineering methodologies.
- Independent judgment in complex technical decisions.
- Experience in test planning, creation, characterization, data analysis, and silicon debug for advanced process technologies.
- Development and debugging of Automated Test Equipment (ATE) test patterns and flows.
- Ensure device testability and manufacturability from development through production phases.
- Implement product improvement measures to reduce cost, increase yield, and resolve quality issues.
- Bachelor’s degree in Electrical Engineering, Computer Science, or Computer Engineering.
Nice to have
- Hands-on ATE (Automatic Test Equipment) test experience, preferably Advantest V93K SMT8.
- Experience with SCAN, BIST, and functional ATE test pattern debug and characterization.
- Unix and Windows proficiency.
- Experience with AI and developing skills/agents.
- Experience in semiconductors, including semiconductor design, architecture, product test, product engineering, semiconductor physics, and/or semiconductor manufacturing.
- Deep semiconductor testing expertise.
- Computer architecture experience, especially GPU architecture or x86 architecture.
- Silicon performance optimization techniques, including power optimization, frequency maximization, and advanced performance management.
- Experience developing Load Boards and Probe Cards.
- Knowledge of scripting languages, such as Python.
- Practical experience in the development and deployment of AI/ML solutions for continuous improvement.
- Expertise with Git, VS Code, and Bash.
- Basic understanding of test pattern conversion methodology and tools.
This role has been open 59 days — well above the 29-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
553
|
Median days open
29 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (553 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 21 | 553 |
| Open roles in the wider Silicon Validation & Test family | 149 | 2226 · 113 employers |
| Median days open | 43 d | 29 d (+14 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Who's hiring in this category
- Teradyne · 76 open roles · median 23 d
- Renesas Electronics · 43 open roles · median 23 d
- Infineon Technologies · 41 open roles · median 39 d
- Micron Technology · 29 open roles · median 33 d
- Qualcomm · 28 open roles · median 29 d
- Texas Instruments · 23 open roles · median 24 d
How we counted: 553 open Silicon Test Engineering (DFT Test) roles from 78 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.