$138,000 - $280,000 USD yearly
This role focuses on developing modern SSD controller technologies.
About the role
This role involves developing modern SSD controller technologies, ensuring SSDs meet the highest standards of performance and reliability. You will be validating PCIe IP within complex system-level use cases for high-performance SSD applications.
What you'll do
- Develop detailed hardware and system specifications from architectural and product requirements.
- Lead PCIe bring-up, characterization, debugging, and validation activities for SSD controller SoCs.
- Evaluate, integrate, and support commercial PCIe IP solutions.
- Develop system-level validation environments and automated test suites for PCIe protocol validation and compliance testing.
- Analyze failures, perform root-cause investigations, and drive issue resolution.
- Validate PCIe IP within complex system-level use cases for high-performance SSD applications.
What you'll need
- Bachelor's degree or equivalent experience in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related area.
- 7+ years of industry experience in hardware development, silicon validation, or PCIe subsystem engineering.
- Expertise with PCIe Gen4, Gen5, and/or Gen6.
- Expertise with PCIe host systems and root complexes.
- Expertise with PCIe IP bring-up and validation or PCIe protocol compliance and interoperability.
- Comprehensive knowledge of PCIe LTSSM (Link Training and Status State Machine).
- Experience with post-silicon validation approaches and debugging techniques.
- Proficiency in Python, TCL, C, or similar scripting and programming languages.
- Experience using high-speed test and measurement equipment including ATE systems, real-time and sampling oscilloscopes, signal and pulse generators, and laboratory power instrumentation.
- Experience partnering with external silicon and IP vendors to boost functionality and solve technical problems.
Nice to have
- Experience implementing or validating PCIe subsystems in ASIC and/or FPGA builds.
- Experience with SSD controller architectures and storage systems.
- Knowledge of SoC architecture, build, integration, or validation.
- Knowledge of PCIe link equalization algorithms, DFE, and receiver architecture concepts.
- PCB build experience, including high-speed signal routing and review, power distribution network build and review, EMI and ESD protection methodologies, or signal integrity and power integrity analysis involving SerDes technologies, high-speed interconnects or power delivery networks.
- Experience applying AI-assisted engineering tools to improve productivity and debug efficiency.
- Master's degree in Electrical Engineering or a related field, or equivalent professional experience.
Skills: PCIe Gen4/Gen5/Gen6, PCIe bring-up, LTSSM, high-speed signal routing, silicon validation
This role has been open 55 days — well below the 89-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
215
|
Median days open
89 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | Market (215 open roles · 44 companies) |
|---|---|---|
| Open roles in category | 9 | 215 |
| Median days open | 127 d | 89 d (+38 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: PCIe Gen4/Gen5/Gen6, PCIe bring-up, LTSSM, high-speed signal routing, silicon validation
Who's hiring in this category
- AMD · 24 open roles · median 60 d
- Cadence Design Systems · 19 open roles · median 152 d
- Qualcomm · 18 open roles · median 68 d
- Synopsys · 16 open roles · median 52 d
- Broadcom · 11 open roles · median 141 d
- Micron Technology (this employer) · 9 open roles · median 126 d
Based on 215 open roles at 44 companies in our index. Snapshot 9 Sept 2026.