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Synopsys

Staff/ Sr Staff DFT Solutions Engineer

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Noida, India 13 days ago
Verification, Validation & Test

Originally posted 22 September 2026 by the employer.

About the role

This role involves delivering end-to-end DFT solutions, from architecture planning and scan insertion through pattern generation, silicon bring-up, and diagnostics analysis.

What you'll do

  • Deliver end-to-end DFT solutions for customer designs, from architecture planning and scan insertion through pattern generation, silicon bring-up, and diagnostics analysis
  • Implement and validate test solutions including scan, MBIST, and IEEE 1687 architectures for complex SoCs with multiple IP blocks
  • Participate in customer design reviews to understand flows, identify gaps, and propose specific improvements that reduce test time or increase coverage
  • Prototype and validate new DFT methodologies in collaboration with Solution Architects
  • Provide technical support and training to customers, including hands-on problem resolution, methodology workshops, and account-level engagement
  • Analyze silicon test data, diagnose failures, and present findings to internal teams and customer stakeholders with clear recommendations

What you'll need

  • Bachelor's degree with 7+ years or Master's degree with 5+ years in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field
  • Hands-on experience with RTL coding, DFT insertion, ATPG pattern generation, and silicon bring-up for digital ICs
  • Deep knowledge of scan architectures, fault models, test access networks, and IEEE standards including 1149.1, 1500, and 1687
  • Proven ability to handle scan implementation and validation for large, multi-IP SoCs with complex hierarchies and multiple clock domains
  • Strong written and verbal communication skills to translate technical concepts for both engineering teams and non-technical stakeholders
Market context

This role has been open 0 days — well below the 62-day median for DFT Engineering roles.

DFT Engineering · DFT Test

Open roles in category
225
Median days open
62 d
Median salary
$203k
See the full market breakdown ▾Category comparison, and who else is hiring
How Synopsys compares in DFT Engineering hiring
Metric Synopsys All employers we track in this specialty (225 roles · 50 employers)
Open roles in this specialty 9 225
Open roles in the wider Digital Design & Verification family 137 3097 · 114 employers
Median days open 16 d 62 d (−46 d vs this employer)
Median salary (USD postings) — $203k

Who's hiring in this category

  • AMD · 39 open roles · median 29 d
  • Qualcomm · 26 open roles · median 80 d
  • NXP Semiconductors · 21 open roles · median 76 d
  • NVIDIA · 18 open roles · median 72 d
  • Micron Technology · 10 open roles · median 115 d
  • Intel Corporation · 8 open roles · median 55 d

How we counted: 225 open DFT Engineering (DFT Test) roles from 50 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Noida, India
On-site
13 days ago

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