Staff Software Engineer — SubSystem Integration Test (SSIT)
$141,300 - $211,900 USD yearly
Originally posted 6 October 2026 by the employer.
This role focuses on subsystem-level validation for ONNX Runtime, ExecuTorch, and TFLite / LiteRT.
About the role
This Staff Software Engineer role involves owning subsystem-level validation at the feature development stage, defining test strategy, and building targeted test content. You will be responsible for validating the Delegates portfolio including ONNX Runtime (QNN Execution Provider), ExecuTorch (HTP/QNN backend), and TFLite / LiteRT.
What you'll do
- Define feature-level test strategy, testability requirements, acceptance criteria, and subsystem test plans.
- Develop and maintain automated test content targeting the subsystem boundary for op and feature coverage, numerical accuracy, and model-level functional correctness.
- Validate on-device behavior on Snapdragon SoCs using HIL infrastructure, covering functional correctness, latency, and memory.
- Triage failures and isolate root causes across the delegate stack (ML framework → QNN runtime → HTP hardware).
- Define and own handoff criteria from SSIT to QA and SIT, including documented test results, known issues, and coverage gaps.
- Serve as the primary technical liaison between the Delegates development team and QA/SIT.
What you'll need
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience; OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience; OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.
- 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.
Nice to have
- Strong Python; proven hands-on experience building automated test frameworks (PyTest or equivalent).
- C/C reading proficiency sufficient to debug delegate and runtime issues at the source level.
- Demonstrated experience in subsystem or integration testing within a hardware/software product development cycle.
- Experience with CI/CD platforms (Jenkins, GitHub Actions, or equivalent) and integrating test automation into build pipelines.
- Strong analytical and debugging skills with ability to isolate failures across multi-layer software stacks.
- Experience validating ML inference frameworks — ONNX Runtime, ExecuTorch, TFLite / LiteRT, or equivalent.
- Hands-on experience with Qualcomm QNN, HTP/DSP, or Snapdragon SoC-based on-device validation.
- Familiarity with model accuracy validation: quantization correctness, op-level numerical comparison, and tolerance analysis.
- C/C proficiency for development and debug of ORT unit tests.
- Cross-platform test experience: Linux, Android, and Windows (ARM64 or x86).
- Experience with JIRA defect tracking and Agile/scrum development practices.
Skills: feature-level test strategy, automated test content, subsystem boundary, ML inference frameworks, Snapdragon SoCs
This role has been open 2 days — well below the 63-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1206
|
Median days open
63 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1206 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 106 | 1206 |
| Open roles in the wider Digital Design & Verification family | 389 | 3175 · 113 employers |
| Median days open | 43 d | 63 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: feature-level test strategy, automated test content, subsystem boundary, ML inference frameworks, Snapdragon SoCs
Who's hiring in this category
- Qualcomm (this employer) · 111 open roles · median 42 d
- AMD · 102 open roles · median 49 d
- NVIDIA · 76 open roles · median 62 d
- Synopsys · 61 open roles · median 25 d
- SiFive · 55 open roles · median 66 d
- Micron Technology · 52 open roles · median 98 d
How we counted: 1206 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.