Staff SOC Physical Design Engineer - Austin, Texas, United States of America, United States
$152,360 - $210,000 USD yearly
Originally posted 15 September 2026 by the employer.
About the role
This individual leads and performs complex responsibilities within the Physical Design Flow for system-on-chip (SoC) products, focusing on target power utilization and optimization.
What you'll do
- Lead, plan, and perform complex responsibilities within the Physical Design Flow of high-speed DDR and graphics.
- Focus on target power utilization and optimization for SoC products, considering impact on power and performance.
- Perform Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis, and closure.
- Conduct various physical verification checks such as LVS, DRC, design-for-manufacturing, and design-for-yield at chip and block levels.
- Provide schedules and support cross-functional engineering efforts to achieve signoff closure for tapeout.
- Contribute at design reviews and project meetings, communicating and implementing development plans.
What you'll need
- Master's Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field.
- Three (3) years of experience in Physical Design Flow, high-speed DDR, graphics, physical verification flows, micro-architecture, SOC algorithm design and modeling, and methodology.
- Experience with Floor Planning.
- Experience with Clock Tree Synthesis.
- Experience with Place and Route.
- Experience with PDN.
- Experience with Timing analysis and closure.
- Experience with physical verification checks (LVS, DRC, design-for-manufacturing, design-for-yield).
Skills: Physical Design Flow, DDR, Floor Planning, Clock Tree Synthesis, Timing analysis
This role has been open 23 days — well below the 60-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
671
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (671 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 131 | 671 |
| Open roles in the wider Physical Implementation family | 180 | 1495 · 107 employers |
| Median days open | 38 d | 60 d (−22 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Physical Design Flow, DDR, Floor Planning, Clock Tree Synthesis, Timing analysis
Who's hiring in this category
- Qualcomm (this employer) · 130 open roles · median 38 d
- AMD · 59 open roles · median 21 d
- NVIDIA · 42 open roles · median 63 d
- Broadcom · 38 open roles · median 88 d
- Synopsys · 35 open roles · median 39 d
- Micron Technology · 25 open roles · median 78 d
How we counted: 671 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.