Staff Physical Design Verification, CAD - Richardson, TX, United States
Originally posted 24 September 2026 by the employer.
About the role
This role involves collaborating with global design and verification teams to develop, optimize, and implement design verification flows.
What you'll do
- Develop tools, flows, and methodologies for Memory designs.
- Integrate commercial EDA tools into design flows.
- Provide training, documentation, and support for new tools and methods to end users.
- Undertake independent research and development of CAD software.
- Identify deficiencies of current tools and flows.
- Evaluate EDA industry product offerings and trends for performance and efficiency gains.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with 5+ years industry experience.
- Strong programming fundamentals with experience in Unix and shell scripting.
- Good knowledge of CMOS circuits, deep-submicron physical design, CMOS manufacturing, and layout design rules.
Nice to have
- Experience with layout flows such as Calibre DRC/LVS, floorplanning, automated P&R, and SPF extraction.
- Experience with design simulation tools and languages including Verilog, Verilog-A, ncverilog, VCS, Spice/FastSpice, FineSim/PrimeSim, and HSPICE.
- Experience with RTL-to-GDS flows.
- Experience with Cadence Virtuoso DFII and SKILL programming.
- Proficiency with Python and Python Qt frameworks.
Skills: EDA tools, Calibre DRC/LVS, RTL-to-GDS, SKILL programming, physical design
This role has been open 0 days — well below the 85-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
683
|
Median days open
85 d
|
Median salary
$197k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (683 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 683 |
| Open roles in the wider Physical Implementation family | 75 | 1417 · 108 employers |
| Median days open | 103 d | 85 d (+18 d vs this employer) |
| Median salary (USD postings) | — | $197k |
Skills observed across this category: EDA tools, Calibre DRC/LVS, RTL-to-GDS, SKILL programming, physical design
Who's hiring in this category
- Cadence Design Systems · 171 open roles · median 147 d
- Synopsys · 57 open roles · median 61 d
- NVIDIA · 45 open roles · median 76 d
- Micron Technology (this employer) · 39 open roles · median 104 d
- Qualcomm · 37 open roles · median 65 d
- Intel Corporation · 26 open roles · median 25 d
How we counted: 683 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.