Staff Package Design Engineer - Bayan Lepas, my, Malaysia

Originally posted 7 October 2026 by the employer.

This role focuses on packaging technologies such as PowerQFN, Flip-Chip, and SiP.

About the role

This role involves designing and developing semiconductor packages, with a focus on advanced packaging technologies. You will contribute to the development of packaging for AI, High Performance Computing (HPC), and Vertical Power Delivery (VPD) applications.

What you'll do

• Design and develop package and interconnect methods for Renesas’s packaging needs in Power SiP/modules, flip-chip LGA, multi-chip module, and power device packaging.
• Work with OSAT/CM to optimize processes and establish process specifications.
• Work with Product Groups and Reliability teams to qualify new packages and processes.
• Ensure smooth transition into production by resolving process integration issues and monitoring processes.
• Develop and maintain technical expertise on advances and innovations in advanced leadframe, power SiP/modules, and flip chip interconnects.
• Address internal and external customer complaints with Marketing, Product groups, Quality, and Operations organization.

What you'll need

• Masters / Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
• 5-15 years of experience in package development emphasizing leadframe, laminate, power QFN/SiP/module, flip-chip packaging, and wafer Front-Side (FSM) / Back-Side (BM) Metallization processing.
• Understanding of semiconductor power device package assembly processes, materials, and technology.
• Knowledge of AutoCAD, Excel, PowerPoint, Word.
• Knowledge of wafer front-side / backside metallization, wire-bonding, flip chip, multi-chip module, SPC (Statistical Process Control), and statistical analysis.

Skills: package design, interconnect methods, Power SiP, flip-chip LGA, multi-chip module