Originally posted 1 October 2026 by the employer.
About the role
As a Staff ML Engineer, you will work across the full stack from model to silicon, optimizing training and inference performance on GPU and AI-accelerator infrastructure while adapting models to the constraints of the underlying chip and its NPU.
What you'll do
- Optimize training and inference performance across GPU and AI-accelerator infrastructure, including MLOps pipelines.
- Design, train, and evaluate ML models across deep learning, LLM, CV, or recommendation systems and take them into production.
- Harden and extend NPU cores, such as building on an open RVV/tensor core like CoralNPU, into production silicon.
- Build and optimize inference engines and serving runtimes against latency, memory, and power constraints.
- Work below the application layer across BMC firmware, embedded Linux, or RTOS (such as Zephyr) to ensure reliable operation on hardware.
- Build automated test and verification harnesses for AI-assisted RTL/DV, hardware bring-up, or manufacturing test.
What you'll need
- 5–7+ years of hands-on AI/ML experience, with a Master's degree required.
- Hands-on experience with AI/ML infrastructure and performance, including GPU clusters, distributed training, inference-serving optimization, and MLOps pipelines.
- Experience with model and algorithm development as well as taking models into production through feature engineering, data pipelines, and deployment.
- Experience with hardware-aware ML, including optimizing inference engines for specific chips or adapting model architecture and quantization to chip constraints.
- Deep, hands-on expertise in at least 2 of the following areas: NPU / AI-accelerator, systems/sys-level software (BMC firmware, embedded Linux, RTOS like Zephyr), inference engine / runtime optimization, automated test/verification harnesses (RTL/DV or MFG test), or cybersecurity (AI-driven log analysis, penetration testing, firmware/hardware security).
Nice to have
- PhD in a relevant field.
Skills: NPU, AI accelerator, inference, tensor core, model optimization
More semiconductor jobs: AI chip design jobs
First seen in our index 0 days ago, well below the 108-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
467
|
Median days since first seen
108 d
|
Category median salary (all employers)
$237k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Axiado | All employers we track in this specialty (467 roles · 73 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 467 |
| Open roles in the wider Software, Firmware & Systems family | 19 | 6642 · 159 employers |
| Median days since first seen | 0 d | 108 d (+108 d vs this employer) |
| Median salary (USD postings) | n/a | $237k |
Skills observed across this category: NPU, AI accelerator, inference, tensor core, model optimization
Who's hiring in this category
- NVIDIA · 108 open roles · median 86 d
- Qualcomm · 94 open roles · median 133 d
- AMD · 21 open roles · median 126 d
- Mobileye · 15 open roles · median 100 d
- Analog Devices · 14 open roles · median 49 d
- Micron Technology · 13 open roles · median 57 d
How we counted: 467 open AI/ML Hardware Engineering (AI ML Hardware) roles from 73 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Software, Firmware & Systems family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.