Originally posted 18 September 2026 by the employer — open 2 days.
About the role
This role involves the architecture, design, and implementation of digital sections of mixed-signal IPs. You will contribute to high-performance and low-power mixed-signal IPs for Qualcomm’s products.
What you'll do
- Architect, design, and implement digital sections of mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, Sensors).
- Apply computer architecture, digital signal processing (DSP), and optimization techniques for improving power, performance, and area (PPA) of IPs.
- Run full suite of ASIC design tools (lint checking, CDC, DFT, synthesis, FV, STA) to validate and implement the design.
- Collaborate with design verification (DV) team to define test plans, verify the design, and fix bugs.
- Work with physical design (PD) team for physical implementation of the design.
- Create design specifications and documentations.
What you'll need
- Master's degree in electrical engineering, Computer Engineering, or related field.
- 5 years of experience in ASIC digital design, including micro-architecture and RTL design.
- Experience working with front-end ASIC tools such as Design Compiler, Fusion Compiler, Modelsim, VCS, Spyglass, and Primetime.
Nice to have
- Experience in low-power digital design.
- Experience in computer architecture, digital signal processing, and algorithm design.
- Experience in scripting languages (Python, Perl).
- Experience with at least one mixed-signal IP, such as SerDes (USB, PCIe, MIPI, UFS), DDR PHY, Timing circuitries (PLL, DLL, FLL), Data Convertors (DAC, ADC), or sensors.
This role has been open 1 day — well below the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
938
|
Median days open
61 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (938 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 143 | 938 |
| Open roles in the wider Digital Design & Verification family | 375 | 3011 · 114 employers |
| Median days open | 53 d | 61 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Qualcomm (this employer) · 143 open roles · median 53 d
- AMD · 61 open roles · median 61 d
- Synopsys · 57 open roles · median 29 d
- NXP Semiconductors · 51 open roles · median 67 d
- NVIDIA · 48 open roles · median 44 d
- Analog Devices · 39 open roles · median 73 d
How we counted: 938 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.