Staff Mask Design Engineer - Chandler, United States
Originally posted 2 October 2026 by the employer.
About the role
This role involves defining, developing, and delivering high-quality, manufacturable IC layouts for Analog and Mixed-Signal ICs used in Automotive applications. The successful candidate will contribute at block and Chip top level, ensuring robust physical implementation.
What you'll do
- Implement physical layouts for Automotive Business Line products at IP, block, and/or Chip Top level.
- Drive and deliver floorplanning activities for blocks and top-level designs.
- Apply layout techniques for device matching, parasitic reduction, ESD protection, latch-up prevention, and yield optimization.
- Execute and sign off physical verification flows, including DRC, LVS, ERC, DFM, and parasitic extraction (PEX).
- Work according to Analog-on-Top and Mixed-Signal-on-Top layout methodologies.
- Lead layout team activities, including task planning, execution, and knowledge sharing.
What you'll need
- Bachelor’s or Master’s degree in Electrical, Electronics, or Microelectronics Engineering.
- 8+ years of experience in Analog and Mixed-Signal IC layout design.
- Proven experience delivering complex layouts at IP, block, and Chip Top level.
- Strong expertise in analog layout techniques, including floorplanning, top-level integration, device matching, symmetry, parasitic management, latch-up prevention, and ESD protection.
- Hands-on expertise with layout and verification tools, including Cadence Virtuoso / Virtuoso XL (OA, PVS) and Mentor Graphics Calibre (DRC, LVS, PEX, DFM).
- Experience with advanced CMOS BCD technologies.
Skills: IC layouts, analog and mixed-signal ICs, floorplanning, DRC, LVS, ERC, DFM, Cadence Virtuoso, Mentor Graphics Calibre
This role has been open 7 days — well below the 29-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
55
|
Median days open
29 d
|
Median salary
$164k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (55 roles · 20 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 55 |
| Open roles in the wider Analog & Mixed-Signal family | 84 | 1416 · 106 employers |
| Median days open | 10 d | 29 d (−19 d vs this employer) |
| Median salary (USD postings) | — | $164k |
Skills observed across this category: IC layouts, analog and mixed-signal ICs, floorplanning, DRC, LVS, ERC, DFM, Cadence Virtuoso, Mentor Graphics Calibre
Who's hiring in this category
- Analog Devices · 8 open roles · median 19 d
- Celero · 8 open roles · median 41 d
- Marvell Technology · 5 open roles · median 16 d
- Renesas Electronics (this employer) · 5 open roles · median 10 d
- NXP Semiconductors · 4 open roles · median 5 d
- onsemi · 4 open roles · median 30 d
How we counted: 55 open Analog IC Design (Analog Layout) roles from 20 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.
Similar Jobs
Senior Design Engineer - Milpitas, CA, United States
Diodes Incorporated · Milpitas, CA, United States
Applied Scientist, Superconducting Digital and Cryogenic Control Electronics,Center for Quantum Computing, Physical Design and Simulation, Enabling Technologies
Amazon · San Francisco, California, United States