$145,600 - $218,400 USD yearly
Originally posted 10 November 2026 by the employer.
About the role
As a member of the hardware design team, you will own the board design lifecycle and drive system-level architecture for FPGA-based emulation platforms. The role encompasses schematic capture, PCB stack-up and layout, power and signal integrity simulation, and lab bring-up in close partnership with software and firmware teams.
What you'll do
- Own the board design lifecycle, including schematic capture, PCB stack-up (up to 26 layers), PCB layout, BOM management, and design verification testing.
- Perform power and signal integrity simulations for 10 Gbps SERDES and high-speed I/O, spanning model extraction, simulation, reporting, and design modifications.
- Lead or support FPGA board design across Xilinx and Altera platforms, incorporating DDR3, DDR4, and DDR5 discrete memory subsystems.
- Direct lab technicians on board and multi-board system installation, bring-up, and root-cause debug.
- Define system architecture across multiple boards and platforms while partnering with mechanical, CAD, and manufacturing teams for DFM optimization.
- Author and maintain hardware design documentation, including HDDs, pinout tables, and design review packages.
What you'll need
- Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, Science, or a related field with 4+ years of ASIC/hardware design experience (or Master's with 3+ years, or PhD with 2+ years).
- At least 5 years of experience in system architecture, hardware board design, and signal integrity simulations (with extensive multi-board architecture experience expected at the Staff level).
- Demonstrated experience in schematic capture, PCB stack-up, and layout for complex multi-layer boards (up to 26 layers) along with BOM management.
- Hands-on experience with FPGA board design (Xilinx and/or Altera) and FPGA HDL coding.
- Experience running power and signal integrity simulations for 10 Gbps or higher SERDES and high-speed I/O using transmission line theory.
- Practical knowledge of DDR3, DDR4, or DDR5 discrete component designs, alongside protocols such as PCIe, I2C, JTAG, UART, SPI, and eMMC.
- Familiarity with EDA and analysis tools including Mentor Graphics DxDesigner/Expedition, Vivado, Quartus, HyperLynx, Sigrity PowerSI/PowerDC, ADS, Ansys HFSS, or SPICE.
Nice to have
- Power supply design experience and PDN (power delivery network) simulations.
- Experience conducting Design for Manufacturing (DFM) and Design for Test (DFT) reviews with PCB fabricators and contract manufacturers.
- Familiarity with scripting languages (Python, Perl) for design automation and test workflows.
- Industry certification such as IPC Certified Interconnect Designer (CID) or equivalent.
- Experience defining board and system design methodologies, reusable IP, or standards adopted across multiple hardware programs.
Skills: board design, schematic capture, PCB layout, signal integrity, SERDES, DDR5
More semiconductor jobs: Qualcomm jobs · Hardware design jobs · San Diego jobs
First seen in our index 0 days ago, well below the 90-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · Serdes Highspeed
|
Open roles in category
100
|
Median days since first seen
90 d
|
Category median salary (all employers)
$197k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (100 roles · 36 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 100 |
| Open roles in the wider Software, Firmware & Systems family | 691 | 6585 · 157 employers |
| Median days since first seen | 156 d | 90 d (−66 d vs this employer) |
| Median salary (USD postings) | n/a | $197k |
Skills observed across this category: board design, schematic capture, PCB layout, signal integrity, SERDES, DDR5
Who's hiring in this category
- NVIDIA · 20 open roles · median 139 d
- Qualcomm (this employer) · 9 open roles · median 187 d
- AMD · 7 open roles · median 55 d
- Intel Corporation · 5 open roles · median 29 d
- Keysight Technologies · 5 open roles · median 165 d
- Astera Labs · 4 open roles · median 55 d
How we counted: 100 open Hardware Systems Engineering (Serdes Highspeed) roles from 36 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Software, Firmware & Systems family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.