Staff Firmware/Software Engineer - Embedded SoC/Microcontroller/DSP/SERDES/AEC/MicroLED/ODSP/PHY/AI Connectivity

Originally posted 20 June 2026 by the employer. Relisted by the employer on 22 October 2026.

About the role

This role is responsible for embedded firmware architecture, design, and technical leadership within the Optical Digital Signal Processing (ODSP) PHY SW team. The team develops embedded firmware running on a RISC-V-based multi-core MCU to control DSP hardware used in pluggable optical modules.

What you'll do

- Architect, design, develop, and test embedded C firmware for controlling DSP hardware. - Drive firmware development for DSP control blocks, including RX/TX signal processing, FEC, PLL/FLL, reference generation, and thermal monitoring. - Translate specifications from standards bodies (MSA/OIF/CMIS) or customers into requirements and sequence diagrams. - Debug issues and drive root cause analysis with hardware and systems teams through test, validation, and customer support. - Plan software milestones, manage Agile sprint planning, and coordinate deliverables across Marketing, AE, Test, Validation, SW_QA, and Hardware teams. - Support customer bring-up, resolve field issues, and implement customer-specific features including FEC burst statistics, VDM telemetry, and CMIS compliance.

What you'll need

- BS, MS, or PhD degree in Computer Science, Electrical/Software Engineering, or a related technical field. - Experience in memory-constrained embedded C/C++ firmware development. - Track record of architecture design, development, code reviews, and testing through to customer volume production. - Understanding of embedded SoC and microcontroller architecture, memory-mapped hardware interfaces, GPIOs, and ISRs.

Nice to have

- Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, or Optical Module SW. - Experience with designing, developing, and debugging software state machines, transitions, context saving, and error handling. - Experience with mixed-signal (analog+digital) control and monitoring, or PID/feedback loop control. - Experience with bare-metal, RTOS, device drivers, or Linux kernel. - Familiarity with RISC-V microcontroller architecture, clang/gcc compiler options, C, Python, git, Linux, makefiles, gdb, and bash. - Familiarity with digital verification test flows, FPGA emulation, and hardware languages such as Verilog. - Familiarity with lab equipment including oscilloscopes, power supplies, PNAs, and ONTs. - Understanding of Ethernet networking from the OSI model (PHY up to data link level), forward error correction, PCS framing, PMA/PMD, and PRBS. - Understanding of signal processing concepts such as histograms, BER, SNR, sampling phase, Shannon limit, impulse & frequency response, and FFT.

Skills: embedded FW, RISC-V-based multi-core MCU, C SDK, Python-based GUI, DSP HW, SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, Optical Module SW, bare-metal