Staff Engineer, Hardware Design (AI2540) - San Jose, California, United States
$136,900 - $219,000 USD yearly
Originally posted 10 September 2026 by the employer.
About the role
This Staff Engineer, Hardware Design position involves owning complex design blocks from microarchitecture and RTL implementation through verification support and silicon bring-up.
What you'll do
- Own microarchitecture definition and RTL implementation of complex blocks from concept through silicon.
- Drive ground-up block design from specification and microarchitecture to RTL, integration, and bring-up.
- Develop high-quality, synthesizable RTL (Verilog/SystemVerilog), including custom logic, protocol adaptation, and data-path optimizations.
- Define block-level interfaces, microarchitectural trade-offs, and design specifications.
- Collaborate with verification, physical design, architecture, and firmware teams to ensure blocks meet functional, timing, power, and area targets.
- Drive block-level synthesis, timing closure, and DFT readiness.
What you'll need
- Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 5+ years of experience in ASIC design with a strong focus on block-level RTL design and silicon development.
- Proven track record of ground-up block design, taking blocks from microarchitecture and RTL through to working silicon.
- Expert-level RTL design skills (Verilog/SystemVerilog), with hands-on experience in synthesis, timing closure, and DFT concepts.
- Strong understanding of microarchitecture trade-offs, data-path and control logic design, and block-level optimization for power, performance, and area.
Nice to have
- Experience designing hardware for machine learning / AI accelerators.
- Experience designing hardware for complex algorithms.
- Experience integrating blocks into larger SoCs.
- Exposure to firmware or driver development.
Skills: RTL design, block-level silicon development, microarchitecture, Verilog/SystemVerilog, synthesis, timing closure, DFT
This role has been open 9 days — well below the 60-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1019
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SiMa.ai | All employers we track in this specialty (1019 roles · 98 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 1019 |
| Open roles in the wider Digital Design & Verification family | 13 | 3183 · 114 employers |
| Median days open | 2 d | 60 d (−58 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL design, block-level silicon development, microarchitecture, Verilog/SystemVerilog, synthesis, timing closure, DFT
Who's hiring in this category
- Qualcomm · 139 open roles · median 60 d
- Synopsys · 86 open roles · median 24 d
- AMD · 73 open roles · median 34 d
- Analog Devices · 50 open roles · median 41 d
- NXP Semiconductors · 48 open roles · median 78 d
- NVIDIA · 46 open roles · median 64 d
How we counted: 1019 open Digital/RTL Design (RTL Design) roles from 98 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.