Staff Engineer Analog Layout - Penang, Malaysia
Originally posted 26 August 2026 by the employer.
About the role
This role involves performing analog circuit block, subsystem, and top-level layout and verification, as well as leading layout design for Analog circuits (block/IP/chip) including floor planning.
What you'll do
- Lead/Co-lead layout design of Analog circuits (block/IP/chip) including floor planning from scratch, performing routing & layout verification and resolve violations.
- Conduct layout design reviews internally & external with circuit designers.
- Plan overall project schedule and distribute tasks to project team members.
- Guide/coach junior engineers for on time delivery & quality.
What you'll need
- Bachelor’s degree in electronic/Microelectronics/Electrical Engineering with >5 years of job experience in Analog Layout.
- Hands-on experience in analog layout from scratch and implementation of analog layout techniques.
- Experience with IR drop/EM analysis.
- Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
- Strong technical, analytical & problem-solving skills in analog layout.
Skills: analog layout, Cadence Virtuoso-VXL, IR drop/EM analysis, CMOS technologies, layout verification
This role has been open 34 days — slightly above the 25-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
49
|
Median days open
25 d
|
Median salary
—
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See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Infineon Technologies | All employers we track in this specialty (49 roles · 21 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 49 |
| Open roles in the wider Analog & Mixed-Signal family | 67 | 1385 · 107 employers |
| Median days open | 41 d | 25 d (+16 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: analog layout, Cadence Virtuoso-VXL, IR drop/EM analysis, CMOS technologies, layout verification
Who's hiring in this category
- Celero · 8 open roles · median 32 d
- Analog Devices · 7 open roles · median 12 d
- Marvell Technology · 4 open roles · median 16 d
- Broadcom · 3 open roles · median 8 d
- onsemi · 3 open roles · median 35 d
- QORVO · 3 open roles · median 33 d
How we counted: 49 open Analog IC Design (Analog Layout) roles from 21 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.