Staff EMIB-T Substrate Yield Engineer
Packaging & Advanced Integration
Originally posted 6 October 2026 by the employer.
This role focuses on EMIB-T substrates for heterogeneous integration.
About the role
What you'll do
- Own day-to-day yield performance and issue closure for assigned supplier lines, modules, products, or process areas.
- Lead structured investigations from containment and hypothesis development through experiments, failure analysis, corrective action, and sustainment.
- Use statistical and spatial analytics to identify signatures by line, tool, material, panel position, geometry, product, and time.
- Establish clear supplier actions, owners, completion criteria, control limits, and verification plans.
- Support DFM/DFY, qualification, ramp readiness, change control, and deployment of dashboards or automated analytics.
- Capture reusable learning and communicate facts, hypotheses, decisions, and residual risks clearly.
What you'll need
- Bachelor's degree with 8+ years of experience, Master's degree with 6+ years, or PhD with 4+ years in Engineering, Materials Science, Physics, Chemistry, Data Science, or a related technical discipline.
- 5+ years of experience in semiconductor manufacturing, advanced packaging, substrate technology, yield engineering, process engineering, or a closely related field.
- Hands-on experience in substrate, advanced packaging, or semiconductor yield engineering, including statistical analysis, defect reduction, process optimization, SPC, DFM/DFY, defect metrology, failure analysis, and HVM execution.
- Experience developing or deploying yield monitoring systems, automated analytics, dashboards, image analytics, computer vision, AI/ML-based defect detection, or automated defect classification systems.
Nice to have
- Experience working directly with substrate suppliers and external manufacturing partners.
- Program leadership experience, including coordinating cross-functional technical teams and driving execution.
- Experience with semi-additive processing, build-up films, microvias, copper plating, lithography, lamination, embedded silicon, TSV, 2.5D/3D packaging, or heterogeneous integration.
- Prior experience supporting technology development, qualification, and manufacturing ramp of advanced semiconductor technologies.
- Experience with automated data pipelines, dashboards, image analytics, computer vision, AI/ML defect detection, or automated defect classification.
Market context
This role has been open 0 days — well below the 60-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
311
|
Median days open
60 d
|
Median salary
$165k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (311 roles · 59 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 311 |
| Open roles in the wider Process, Fab & Equipment family | 168 | 9631 · 109 employers |
| Median days open | 52 d | 60 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $165k |
Who's hiring in this category
- KLA Corporation · 52 open roles · median 117 d
- Micron Technology · 36 open roles · median 38 d
- Renesas Electronics · 21 open roles · median 36 d
- Infineon Technologies · 17 open roles · median 54 d
- onsemi · 15 open roles · median 27 d
- GlobalFoundries · 13 open roles · median 69 d
How we counted: 311 open Packaging Engineering (Advanced Packaging) roles from 59 employers tracked in the SemiconductorJobs index, counted 6 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.