Staff Embedded Firmware & System Software Engineer — Platform Controller and SoC Stack - Remote, India

About the role

The work includes bootloader, kernel drivers, PCIe subsystem, and IOMMU configuration to prepare raw silicon into a platform an operating system can run on.

What you'll do

• Design, implement, and maintain Zephyr RTOS firmware for platform management controllers, including device drivers, subsystem integration, and application-level services.
• Write and review drivers against Zephyr's driver model, including devicetree bindings, Kconfig, init levels, and `struct device` APIs.
• Bring up and debug PCIe links on first silicon, addressing LTSSM progression, link training failures, lane reversal, polarity, equalization, speed, and width negotiation.
• Implement and maintain PCIe host controller and endpoint drivers, covering enumeration, configuration space, BAR allocation, MSI/MSI-X interrupt routing, AER, error handling, ASPM, and link power states.
• Configure and validate IOMMU behavior, including address translation, DMA remapping, device isolation domains, page-table management, fault reporting, and recovery.
• Perform post-silicon bring-up, including first-boot debug, clock and reset validation, bus enumeration, and triage of RTL-versus-firmware ambiguity with design teams.
• Debug hard problems using JTAG/SWD, ETM/ITM trace, protocol analyzers, and logic analyzers, including intermittent, timing-dependent, and multi-master failures.

What you'll need

• 8–10 years of professional embedded firmware and/or system software development in C, with exposure to modern C++ or Rust.
• Hands-on RTOS experience on 32-bit microcontrollers (Arm Cortex-M or RISCV) covering scheduling, priority assignment, ISR design, synchronization primitives, and failure modes.
• Driver development experience against a formal driver model, including bus drivers and interrupt-driven peripherals.
• System software fundamentals: virtual memory, address translation, DMA, cache coherency, and the kernel/userspace boundary.
• Working knowledge of PCIe architecture, including enumeration, configuration space, BARs, MSI/MSI-X, and the transaction model.
• Understanding of IOMMU purpose and costs: translation, isolation, and DMA failure modes when misconfigured.
• Demonstrated ability to read a hardware specification or register map and translate it into correct, testable software.
• Applied AI/ML knowledge.
• BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.

Nice to have

• Direct experience with PCIe and interconnect.
• Direct experience with IOMMU and virtualization.
• Direct experience with System software.
• Direct experience with RTOS and platform.
• Direct experience with Peripherals and subsystems.