Staff Design Verification Engineer - Duluth, United States
Originally posted 1 October 2026 by the employer.
This role focuses on the verification of advanced memory data buffer products, including DDR6.
About the role
This Staff Design Verification Engineer role involves contributing to the verification of advanced memory data buffer products for data center, AI, and cloud computing applications. The role focuses on verifying products that enable high-bandwidth, power-efficient memory solutions, including DDR6 and future generations.
What you'll do
- Drive verification activities for complex digital designs at the block and system level.
- Develop and execute verification plans based on functional and performance specifications.
- Develop, maintain, and optimize SystemVerilog/UVM verification environments and testbenches.
- Develop verification tests, functional coverage, checkers, and other verification components.
- Drive and monitor coverage to ensure verification goals are achieved.
- Analyze verification results, debug failures, and identify functional or design issues.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
- 8+ years of related experience in semiconductor design verification.
- Strong proficiency with SystemVerilog.
- Hands-on experience using UVM (Universal Verification Methodology).
- Experience developing and debugging UVM-based verification environments and testbenches.
- Experience with verification planning, functional verification, coverage, checkers, and test development.
Nice to have
- Experience with DDR4, DDR5, memory interfaces, data buffers, or other high-speed memory technologies.
- Experience improving verification methodologies, efficiency, or reuse.
- Experience serving as a technical resource or mentoring other engineers.
Skills: SystemVerilog, UVM, verification environments, functional coverage, DDR4/DDR5
This role has been open 14 days — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1195
|
Median days open
64 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (1195 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 32 | 1195 |
| Open roles in the wider Digital Design & Verification family | 86 | 3204 · 115 employers |
| Median days open | 16 d | 64 d (−48 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: SystemVerilog, UVM, verification environments, functional coverage, DDR4/DDR5
Who's hiring in this category
- Qualcomm · 109 open roles · median 37 d
- AMD · 97 open roles · median 51 d
- NVIDIA · 84 open roles · median 58 d
- Synopsys · 63 open roles · median 31 d
- SiFive · 55 open roles · median 73 d
- Arm Holdings · 49 open roles · median 101 d
How we counted: 1195 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.