Staff Applications Engineer, HAV Solutions - Remote
Originally posted 16 September 2026 by the employer — open 4 days.
About the role
This role supports customer deployments of HAPS and ProtoCompiler on SoC designs, working through the ASIC-to-FPGA flow.
What you'll do
- Support customer deployments of HAPS and ProtoCompiler, including partitioning, synthesis, place-and-route, timing closure, and hardware bring-up.
- Debug customer designs involving interface IP such as DDR4/DDR5, LPDDR, PCIe, Ethernet, USB, AXI, and other standard protocols.
- Reproduce and analyze technical issues, working with R&D to identify root causes and deliver solutions or workarounds.
- Develop and document methodologies for partitioning strategies, clock architecture, debug instrumentation, and bring-up procedures.
- Use Verdi, ProtoCompiler runtime debug tools, and protocol analyzers to troubleshoot RTL, netlist, timing, and hardware issues.
What you'll need
- Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
- 5-8 years in FPGA implementation, ASIC design, ASIC verification, FPGA prototyping, or applications engineering.
- Solid experience with FPGA synthesis, place-and-route, and timing closure using Xilinx Vivado, Intel Quartus, or similar tools.
- Working knowledge of SystemVerilog, RTL design, and verification concepts.
- Hands-on experience with at least one interface IP family such as PCIe, DDR, Ethernet, USB, or AXI.
- Scripting ability in Tcl, Python, or shell for automation and flow customization.
Skills: HAPS, ProtoCompiler, ASIC-to-FPGA flow, FPGA synthesis, DDR/PCIe/Ethernet IP
This role has been open 2 days — well below the 36-day median for Applications FAE roles.
Applications FAE · EDA Tools
|
Open roles in category
94
|
Median days open
36 d
|
Median salary
$157k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (94 roles · 10 employers) |
|---|---|---|
| Open roles in this specialty | 44 | 94 |
| Median days open | 5 d | 36 d (−31 d vs this employer) |
| Median salary (USD postings) | — | $157k |
Skills observed across this category: HAPS, ProtoCompiler, ASIC-to-FPGA flow, FPGA synthesis, DDR/PCIe/Ethernet IP
Who's hiring in this category
- Synopsys (this employer) · 44 open roles · median 5 d
- Cadence Design Systems · 19 open roles · median 61 d
- Renesas Electronics · 14 open roles · median 37 d
- Keysight Technologies · 6 open roles · median 67 d
- GlobalFoundries · 3 open roles · median 72 d
- AMD · 2 open roles · median 62 d
How we counted: 94 open Applications FAE (EDA Tools) roles from 10 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.