Staff Analog/Mixed Signal Engineer - San Jose, California, United States

Originally posted 1 October 2026 by the employer.

About the role

This role involves the design and development of high-performance PLL and clock generation circuits. The focus will be on RF transceivers, SerDes, and high-speed I/O applications in advanced deep-submicron CMOS technologies.

What you'll do

• Design RF/Analog PLL and clocking circuits using advanced deep-submicron CMOS technologies.
• Design SerDes analog PHY circuits using advanced deep-submicron CMOS technologies.
• Perform system modeling and analysis for mixed-signal systems.
• Perform design verification and production support tasks.
• Work with digital and software developers to meet system requirements.

What you'll need

• Bachelor’s with 10+ years of experience or Master's with 8+ years of experience or PhD with 5 years of experience in a related field.
• Hands-on experience designing frequency synthesizer and clock generation circuits such as VCO, DCO, charge-pump, analog or digital phase detector, regulators, bandgap reference, reference clock oscillator and buffer, DLL, phase interpolator in deep sub-micron CMOS technologies.
• Ability to comprehend PLL loop system knowledge to circuit level specifications.
• Strong knowledge of IC design CAD tools such as Spectre, SpectreRF, AMS simulator, Matlab.
• Familiarity with Verilog, SystemVerilog programming.
• Thorough understanding of physical layout requirements and ability to perform critical layouts.
• Lab testing skills to evaluate prototype units to design specifications.

Skills: PLL, clock generation, RF transceivers, SerDes, CMOS technologies