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NVIDIA

SRAM Design Engineer - CA, Santa Clara, United States

NVIDIA US, CA, Santa Clara, United States Full-time 1 day ago
Digital Design & SoC Architecture

$116,000 - $189,750 USD yearly

Originally posted 15 October 2026 by the employer.

Join the Digital IP (DIP) group focusing on SRAM compilers.

About the role

This role involves the design, verification, and debug of embedded SRAMs, and the development of SRAM compilers for use in NVIDIA's chips.

What you'll do

  • Perform transistor-level circuit design, layout implementation, physical and logical verification, and debug of SRAM macros.
  • Develop and code SRAM compilers to automate the assembly and validation of SRAM macros.
  • Explore future process nodes and develop techniques for optimal power, performance, and area characteristics.
  • Guide SOC design, silicon test, and productization efforts for new silicon.

What you'll need

  • BSEE (or equivalent experience).
  • 2+ years of professional experience in SRAM design.
  • Familiarity with Cadence Virtuoso schematic and layout capture tools.
  • Ability to use AI effectively in day-to-day tasks.

Skills: SRAM design, transistor-level circuit design, layout implementation, SRAM compiler development, Cadence Virtuoso

Market context

This role has been open 0 days — well below the 68-day median for Memory Design roles.

Memory Design · Memory Design

Open roles in category
305
Median days open
68 d
Median salary
$200k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NVIDIA compares in Memory Design hiring
Metric NVIDIA All employers we track in this specialty (305 roles · 29 employers)
Open roles in this specialty 9 305
Median days open 52 d 68 d (−16 d vs this employer)
Median salary (USD postings) — $200k

Skills observed across this category: SRAM design, transistor-level circuit design, layout implementation, SRAM compiler development, Cadence Virtuoso

Who's hiring in this category

  • Micron Technology · 157 open roles · median 86 d
  • Synopsys · 32 open roles · median 55 d
  • Qualcomm · 18 open roles · median 98 d
  • Broadcom · 17 open roles · median 56 d
  • SanDisk · 17 open roles · median 42 d
  • NVIDIA (this employer) · 8 open roles · median 57 d

How we counted: 305 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
Full-time
$116,000 - $189,750 USD yearly
1 day ago

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