Originally posted 2 September 2026 by the employer.
About the role
This role involves developing and maintaining hardware physical design flow in a production environment.
What you'll do
- Develop, maintain, and enhance Physical Design CAD flows supporting AMD's AI, HPC, CPU, GPU, and SoC programs.
- Deploy and support industry-standard EDA tools and methodologies across multiple design projects.
- Develop Physical Design solutions for place-and-route, timing closure, power optimization, and design convergence.
- Debug and optimize physical design challenges related to power, performance, and area (PPA).
- Create and maintain validation environments, test suites, regression infrastructure, and qualification methodologies.
- Evaluate, qualify, and integrate new EDA tool capabilities and vendor technologies.
What you'll need
- Experience with Physical Design implementation and CAD flow development.
- Expertise with Synopsys IC Compiler II, Fusion Compiler, Primetime, and Cadence Innovus.
- Experience with physical verification, extraction tools (StarRC or equivalent), and timing signoff.
- Understanding of power, performance, and area (PPA) optimization.
- TCL and Python scripting skills for automation and tool development.
- Experience supporting multiple chip tape outs and production design environments.
Nice to have
- Demonstrated use of AI tools or automation to improve engineering productivity.
Academic credentials
- Bachelor’s or master’s degree in electrical engineering, Computer Science, or equivalent is preferred.
Benefits
- Benefits offered are described: AMD benefits at a glance.
Skills: Physical Design CAD flows, EDA tools, Synopsys Fusion Compiler, Cadence Innovus, scripting
This role has been open 42 days — well below the 78-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
688
|
Median days open
78 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (688 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 23 | 688 |
| Open roles in the wider Physical Implementation family | 85 | 1467 · 108 employers |
| Median days open | 17 d | 78 d (−61 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: Physical Design CAD flows, EDA tools, Synopsys Fusion Compiler, Cadence Innovus, scripting
Who's hiring in this category
- Cadence Design Systems · 153 open roles · median 168 d
- Synopsys · 65 open roles · median 38 d
- Micron Technology · 44 open roles · median 80 d
- Qualcomm · 41 open roles · median 66 d
- NVIDIA · 39 open roles · median 79 d
- GlobalFoundries · 33 open roles · median 35 d
How we counted: 688 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.