$191,800 - $287,800 USD yearly
Originally posted September 16, 2026 by the employer.
About the role
This role drives architectural analysis, performance modeling, and system optimization for computing platforms across processors and complex SoCs. Technical scope covers bottlenecks across CPUs, DSPs, NPUs, memory subsystems, interconnects, and I/O fabrics.
What you'll do
- Analyze and optimize performance of complex SoCs, processors, and heterogeneous computing systems.
- Develop performance models, benchmarks, and simulation environments to evaluate architectural tradeoffs.
- Investigate system-level bottlenecks across CPUs, DSPs, NPUs, memory subsystems, interconnects, and I/O fabrics.
- Work with operating systems, firmware, and device drivers to analyze hardware-software interactions and performance impacts.
- Develop profiling, tracing, and instrumentation methodologies to characterize system behavior.
- Interpret silicon measurements and correlate results with simulation and modeling data.
What you'll need
- Bachelor's, Master's, or Ph.D. in Computer Engineering, Electrical Engineering, Computer Science, or a related field with at least 4+ to 6+ years of relevant experience (or 10 years of industry experience in performance engineering, computer architecture, or system architecture).
- 2+ years of experience with high-performance microprocessor design.
- Strong understanding of processor microarchitecture, computer system architecture, memory hierarchies, cache architectures, interconnects, and SoC design.
- Experience with performance modeling, simulation, or architectural analysis tools.
- Proficiency in C/C++ and scripting languages such as Python.
- Experience developing, debugging, or optimizing Linux or Windows device drivers, along with an understanding of operating system internals.
Nice to have
- Experience with DSP, AI/ML accelerators, GPU, or NPU architectures.
- Familiarity with virtualization technologies, IOMMU, PCIe, SR-IOV, or SIOV.
- Knowledge of power-performance tradeoff analysis and performance-per-watt optimization.
- Experience with silicon bring-up and post-silicon performance characterization.
- Understanding of cache coherence protocols and memory consistency models.
- Experience with large-scale performance benchmarking and workload characterization.
Skills: microarchitecture, performance modeling, SoC, cache architectures, interconnects
More semiconductor jobs: Qualcomm jobs · SoC design jobs · Austin jobs
First seen in our index 59 days ago, well below the 72-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
520
|
Median days since first seen
72 d
|
Category median salary (all employers)
$228k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (520 roles · 70 employers) |
|---|---|---|
| Open roles in this specialty | 94 | 520 |
| Open roles in the wider Digital Design & Verification family | 454 | 3639 · 122 employers |
| Median days since first seen | 66 d | 72 d (+6 d vs this employer) |
| Median salary (USD postings) | n/a | $228k |
Skills observed across this category: microarchitecture, performance modeling, SoC, cache architectures, interconnects
Who's hiring in this category
- Qualcomm (this employer) · 92 open roles · median 73 d
- NVIDIA · 69 open roles · median 86 d
- AMD · 41 open roles · median 72 d
- Apple · 40 open roles · median 14 d
- Arm Holdings · 28 open roles · median 17 d
- Micron Technology · 21 open roles · median 113 d
How we counted: 520 open SoC/Chip Architecture (SOC Architecture) roles from 70 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.