Sr. Staff Engineer, RTL Physical Implementation Lead - Austin, Texas, United States
$100,000 - $500,000 USD yearly
Originally posted 22 May 2026 by the employer.
Lead front-end RTL physical implementation and PPA optimization for high-performance RISC-V CPU cores.
About the role
Join the CPU design team to lead the front-end RTL physical implementation team and drive CAD flows across multiple process technologies. The role focuses on a high-performance CPU based on RISC-V ISA, collaborating with DV, PD, RTL, and performance teams to deliver timing- and power-converged designs.
What you'll do
- Own front-end physical implementation and PPA definition for a high-performance RISC-V CPU and CPU subsystem.
- Work closely with microarchitects and RTL designers to optimize frequency, power, and area across process nodes.
- Define initial floorplans and early area, power, and frequency estimates for key CPU and subsystem configurations.
- Partner with the broader PD organization and PD leads to improve and standardize methodologies, flows, and customer collateral for CPU, subsystem, and system IPs.
- Drive physical design experiments, evaluate results, and optimize power, performance, and area.
- Summarize and communicate PPA trade-offs and recommendations to the broader RISC-V and PD teams.
What you'll need
- Expertise in physical design practices used to optimize PPA, with experience in high-performance physical design.
- Proficiency in RTL coding (Verilog/VHDL) and familiarity with industry-standard tools for simulation and power analysis.
- Demonstrated skill in synthesis, place and route tools, including flows and physical design methodology.
- Background in CPU micro-architecture.
This role has been open 154 days — well above the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1084
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (1084 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 1084 |
| Open roles in the wider Digital Design & Verification family | 26 | 3328 · 115 employers |
| Median days open | 113 d | 63 d (+50 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 160 open roles · median 60 d
- Synopsys · 87 open roles · median 36 d
- AMD · 77 open roles · median 42 d
- Analog Devices · 49 open roles · median 53 d
- NXP Semiconductors · 42 open roles · median 92 d
- NVIDIA · 39 open roles · median 64 d
How we counted: 1084 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.