Sr. Staff Engineer - Digital Design Verification - Austin, Texas, United States
Originally posted 8 June 2026 by the employer.
Architect and execute UVM and C/C++ testbenches for low-power SoCs integrating CPUs, DSPs, and AMBA interconnects.
About the role
You will be responsible for verifying complex digital designs, including Systems-on-Chip (SoCs) with multiple CPUs, digital signal processors, security hardware, interconnects, and peripheral logic for IoT and edge-compute applications.
What you'll do
- Own and execute end-to-end digital verification at block, sub-system, and full-chip SoC levels. - Architect and implement scalable, reusable UVM-based testbenches using SystemVerilog. - Develop and maintain C/C++ based verification libraries and tests for SoC-level validation. - Drive constrained-random and directed testing, including scoreboarding and self-checking mechanisms. - Define, track, and close functional and code coverage goals across full-chip simulation and regression environments. - Automate verification flows using Python, Perl, and Makefiles for regressions, coverage collection, and reporting.
What you'll need
- BSEE or MSEE with 8–12 years of hands-on digital design verification experience. - A proven track record of multiple tape-outs with silicon functioning to specification. - Deep expertise in SystemVerilog, UVM, Verilog, functional coverage, and code coverage methodologies. - Hands-on experience with C/C++ based verification in SoC environments and processor-based systems. - Experience with AMBA protocols (AXI, AHB, APB), DMA, flow control, and standard serial interfaces. - Experience verifying complex SoCs integrating multiple 3rd-party IPs and VIPs.
Nice to have
- Experience verifying low-power digital architectures and features. - Experience with ARM and/or RISC-V processor-based systems. - Experience with security IPs (Crypto, OTP), DSP and compute-heavy subsystems, or edge-based AI/ML inference workloads.
This role has been open 88 days — well above the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1036
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Ambiq Micro | All employers we track in this specialty (1036 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 1036 |
| Open roles in the wider Digital Design & Verification family | 13 | 3224 · 116 employers |
| Median days open | 88 d | 61 d (+27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 140 open roles · median 65 d
- Synopsys · 86 open roles · median 33 d
- AMD · 71 open roles · median 39 d
- Analog Devices · 47 open roles · median 51 d
- NVIDIA · 42 open roles · median 61 d
- NXP Semiconductors · 42 open roles · median 87 d
How we counted: 1036 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.