Skip to main content
AMD

Sr. Signal Integrity/Power Integrity Engineer - CA, Santa Clara, United States

AMD US, CA, Santa Clara, United States Full-time 2 months ago
Analog & Mixed-Signal Design

Originally posted 24 July 2026 by the employer.

About the role

This role is responsible for ensuring that AMD’s products deliver reliability, performance, and efficiency.

What you'll do

  • Model and simulate end-to-end high-speed channels including transceivers, IC package, PCB, and cross-boards connectors/cables.
  • Utilize industry-standard tools and methodologies for time/frequency domain signal integrity analysis (IBIS-AMI, SPICE, full-wave EM analysis).
  • Identify and resolve link quality issues such as loss, reflection, and crosstalk.
  • Conduct channel-simulations to optimize Eye Diagram, Bit Error Rate (BER), and Signal-Noise-Ratio (SNR) for high-speed signaling.
  • Perform Channel Operation Margin (COM) analysis to validate channel health for IEEE compliance.
  • Drive PCB physical design, create PCB stack-up, generate PCB design rules, and review PCB layout.

What you'll need

  • Master or PhD’s degree in Electrical Engineering, Computer Engineering, or related fields.

Nice to have

  • 10+ years of experience in high-speed signal integrity and power integrity engineering fields.
  • Strong background in PCB and package design for signal integrity and power integrity.
  • Strong expertise in high-speed architecture, interconnects, and PCB/package design.
  • Deep knowledge of high-speed interfaces (PCIe, Ethernet, DDR).
  • Proficiency in SI/PI simulation tools (Keysight ADS, Cadence Sigrity, Ansys HFSS).
  • Familiarity with MATLAB or Python for data analysis and automation.
  • Hands-on experience with lab testing tools (TDR, VNA, High-Speed Oscilloscopes, Spectrum Analyzer).

Skills: Signal Integrity, Power Integrity, high-speed channels, IC package, PCB

Market context

This role has been open 67 days — below the 76-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
239
Median days open
76 d
Median salary
$177k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How AMD compares in High-Speed IO/SerDes Design hiring
Metric AMD All employers we track in this specialty (239 roles · 49 employers)
Open roles in this specialty 27 239
Open roles in the wider Analog & Mixed-Signal family 36 1385 · 108 employers
Median days open 60 d 76 d (−16 d vs this employer)
Median salary (USD postings) — $177k

Skills observed across this category: Signal Integrity, Power Integrity, high-speed channels, IC package, PCB

Who's hiring in this category

  • AMD (this employer) · 28 open roles · median 64 d
  • Synopsys · 26 open roles · median 44 d
  • Qualcomm · 20 open roles · median 58 d
  • Cadence Design Systems · 18 open roles · median 181 d
  • Apple · 12 open roles · median 7 d
  • NVIDIA · 11 open roles · median 116 d

How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
Full-time
2 months ago

Share this job