Sr Principal Test Engineer - Irvine, CA, United States
Originally posted 16 September 2026 by the employer.
About the role
This role involves providing unique and optimized test solutions as part of the Core Test Technology Group, focusing on advanced technologies including Custom ASIC, Network Switch, and Server & Network Processors.
What you'll do
- Develop product test programs on Advantest 93K tester and Teradyne tester platforms.
- Design tester hardware for high-speed testing.
- Create characterization, production, and wafer sort test programs on the Advantest 93K tester.
- Document detailed test plans and methodologies to meet product specifications.
- Participate in testability reviews with DFT/DFM teams to define and enhance yield and test methodologies.
- Convert test patterns from design simulation environments to ATE format.
- Lead test flow optimization, test time reduction, insertion removals, and yield improvement for production release.
What you'll need
- Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 15-20 years of experience, or a Master's degree with 10-15 years of experience.
- Minimum 10+ years of test program development experience on Advantest 93K ATE tester platform or Teradyne (Uflex or UflexPlus) ATE Tester Platform.
- Experience in ATE testing, test methodology, silicon process, DFT/DFM, and high-speed digital testing.
- 10+ years of experience with C/C++, JAVA, Perl, Python, and Linux environment.
This role has been open 22 days — below the 24-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
523
|
Median days open
24 d
|
Median salary
$169k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (523 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 17 | 523 |
| Open roles in the wider Silicon Validation & Test family | 54 | 2215 · 111 employers |
| Median days open | 16 d | 24 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $169k |
Who's hiring in this category
- Teradyne · 67 open roles · median 21 d
- Infineon Technologies · 39 open roles · median 35 d
- Renesas Electronics · 39 open roles · median 24 d
- AMD · 28 open roles · median 36 d
- Micron Technology · 28 open roles · median 30 d
- Qualcomm · 25 open roles · median 23 d
How we counted: 523 open Silicon Test Engineering (DFT Test) roles from 75 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.