Sr. Principal Technical Program Manager – Digital IP Development - Austin (Oakhill, Office), United States
Originally posted 27 August 2026 by the employer.
About the role
This role leads Digital IP development from planning through release, driving execution across complex engineering programs.
What you'll do
- Lead Digital IP and subsystem development programs from planning through IP release and SoC integration readiness.
- Develop and manage integrated program plans, including scope, schedules, milestones, dependencies, risks, deliverables, and release criteria.
- Drive cross-functional execution across architecture, design, verification, validation, software, and SoC integration teams.
- Support portfolio planning, resource prioritization, and execution visibility across multiple Digital IP programs.
- Drive risk management, issue resolution, decision closure, and timely escalation.
- Lead technical reviews, program checkpoints, and leadership updates, communicating status, risks, actions, and key decisions.
What you'll need
- BSEE with 12+ years of Digital IP, SoC development, or technical program management experience.
- Strong understanding of Digital IP development flows, including architecture, RTL design, verification, integration, release management, and signoff.
- Proven ability to manage complex engineering programs across schedules, milestones, dependencies, risks, deliverables, and execution tracking.
- Hands-on experience developing dashboards, KPIs, and analytical reporting solutions using Power BI, Excel, SQL, Jira, Confluence, Microsoft Project, or similar tools.
- Proven ability to analyze program execution, schedule performance, resource utilization, risk trends, and release readiness data to drive informed business and engineering decisions.
- Experience translating complex engineering and project data into concise executive-level insights, recommendations, and action plans.
Nice to have
- Experience with portfolio planning, resource forecasting, and capacity management.
- Experience building executive dashboards, KPI frameworks, and business intelligence solutions.
- Experience with AMBA/AHB/AXI protocols, memory subsystems, ROM, RAM, Flash, LPDDR/DDR, and memory controllers.
- Experience with RTL design, micro-architecture, verification, timing analysis, DFT, implementation, CDC/RDC, lint, synthesis, and signoff flows.
- Experience supporting automotive, industrial, safety, security, or other high-reliability semiconductor programs.
Skills: Digital IP development, program plans, cross-functional execution, SoC integration, risk management
This role has been open 49 days — slightly above the 47-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
175
|
Median days open
47 d
|
Median salary
$219k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (175 roles · 47 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 175 |
| Median days open | 35 d | 47 d (−12 d vs this employer) |
| Median salary (USD postings) | — | $219k |
Skills observed across this category: Digital IP development, program plans, cross-functional execution, SoC integration, risk management
Who's hiring in this category
- Qualcomm · 26 open roles · median 50 d
- AMD · 20 open roles · median 28 d
- NVIDIA · 19 open roles · median 47 d
- Synopsys · 14 open roles · median 44 d
- Arm Holdings · 10 open roles · median 81 d
- Apple · 6 open roles · median 65 d
How we counted: 175 open Technical Program Management (SOC Architecture) roles from 47 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.