Sr. Principal SW Engineer, 3DIC P&R & AI-driven EDA Automation - San Jose, United States
$178,500 - $331,500 USD yearly
Originally posted 13 July 2026 by the employer.
Integrity 3D-IC platform integration and Agentic AI applications.
About the role
Cadence Design Systems is hiring a Sr. Principal SW Engineer, 3DIC P&R & AI-driven EDA Automation based in San Jose. The role focuses on developing interfaces and integrating Cadence tools and engines into the Integrity 3D-IC platform alongside Agentic AI applications.
What you'll do
- Develop interfaces and integrate various Cadence tools and engines into the Integrity 3D-IC platform. - Work closely with R&D groups to develop, integrate, and enhance 3D-IC solutions, covering 3D-IC system planning, implementation, analysis/verification, and Agentic AI applications. - Collaborate with field teams in customer engagements to deliver technical support and guidance. - Coordinate with multiple R&D groups and field teams to enable 3D-IC solutions for customers.
What you'll need
- BS degree with 10+ years or MS degree with 5+ years of engineering work experience in the semiconductor industry. - Experience in physical implementation, place-and-route, and signoff tools. - Familiarity with Cadence digital flows and advanced packaging design with Allegro Package Designer. - Hands-on experience in scripting languages, such as TCL, Perl, YAML, and Python. - Trouble-shooting and technical documentation skills.
Nice to have
- Knowledge and experience in 3D-IC system planning, implementation, analysis, and signoff flows.
Skills: EDA flows, C++, Tcl, Python, 3DIC
This role has been open 99 days — well above the 73-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
672
|
Median days open
73 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (672 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 154 | 672 |
| Open roles in the wider Physical Implementation family | 178 | 1441 · 110 employers |
| Median days open | 152 d | 73 d (+79 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: EDA flows, C++, Tcl, Python, 3DIC
Who's hiring in this category
- Cadence Design Systems (this employer) · 154 open roles · median 169 d
- Synopsys · 64 open roles · median 38 d
- Micron Technology · 45 open roles · median 48 d
- Qualcomm · 36 open roles · median 77 d
- GlobalFoundries · 33 open roles · median 40 d
- Keysight Technologies · 32 open roles · median 74 d
How we counted: 672 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 20 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.