$161,000 - $299,000 USD yearly
Originally posted 30 September 2026 by the employer.
Develop high-performance software engines and algorithms for Innovus physical synthesis.
About the role
This role involves building high-performance software engines and algorithms for physical synthesis, helping advance performance, power, and area (PPA), timing closure, and design productivity within the Innovus R&D team.
What you'll do
- Design, implement, unit-test, and optimize high-performance C++ engines for physical synthesis, placement, and timing-driven optimization.
- Develop advanced graph algorithms, spatial data structures, and continuous/combinatorial optimization techniques for massive-scale physical design workloads.
- Identify and eliminate CPU bottlenecks, memory footprint overhead, and algorithmic scaling limits in production C++ codebases.
- Translate research concepts and mathematical formulations into robust, maintainable, production-quality software.
- Implement multi-threaded and distributed algorithms for computationally intensive implementation engines.
- Develop physical design optimization modules addressing timing, power, performance, area (PPA), and congestion.
What you'll need
- Master’s or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field (or equivalent hands-on industry experience).
- Strong hands-on experience developing high-performance, production-quality C++ (C++17/20) in Linux environments.
- Solid foundation in data structures, graph algorithms, computational geometry, memory management, and software architecture.
- Practical experience with multithreaded or concurrent programming and low-level performance profiling.
- Proven ability to analyze, debug, and optimize complex algorithmic bottlenecks in large-scale software systems.
Nice to have
- Prior experience developing EDA tools, with specific knowledge in physical synthesis, global/detail placement, static timing analysis (STA), routing, or timing closure.
- Exposure to applying machine learning, deep learning, reinforcement learning, or data-driven heuristics to software optimization problems.
- Proficiency with Python, Tcl, or shell scripting for benchmarking and workflow automation.
- Experience with SIMD vectorization, GPU/CUDA acceleration, or large-scale distributed compute frameworks.
Skills: physical synthesis, placement, timing-driven optimization, C++, EDA tools
This role has been open 9 days — well below the 79-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
704
|
Median days open
79 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (704 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 161 | 704 |
| Open roles in the wider Physical Implementation family | 185 | 1485 · 107 employers |
| Median days open | 164 d | 79 d (+85 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: physical synthesis, placement, timing-driven optimization, C++, EDA tools
Who's hiring in this category
- Cadence Design Systems (this employer) · 163 open roles · median 162 d
- Synopsys · 59 open roles · median 36 d
- Micron Technology · 44 open roles · median 107 d
- Qualcomm · 42 open roles · median 60 d
- NVIDIA · 41 open roles · median 73 d
- GlobalFoundries · 30 open roles · median 51 d
How we counted: 704 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.