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Cadence Design Systems

Sr Principal HW Design Engineer-Emulation Acceleration System Platform - San Jose, United States

Cadence Design Systems SAN JOSE, United States 3 months ago
Digital Design & SoC Architecture

$178,500 - $331,500 USD yearly

Originally posted 28 July 2026 by the employer.

This role focuses on our emulation-acceleration system platform.

About the role

This role involves architecting systems, designing boards, and sustaining current hardware platforms for our emulation-acceleration system platform, which is a configurable scalable system.

What you'll do

  • Architect, design, bring-up, and sustain hardware system platforms.
  • Continuously develop and apply technical domain expertise in Hardware Engineering.
  • Establish and maintain Engineering Hardware standards, procedures, performance levels, and documentation requirements.
  • Lead process improvement initiatives to drive productivity and quality.
  • Lead design reviews.

What you'll need

  • Bachelor degree in Electrical Engineering with a minimum of 12 years of experience OR MS with a minimum of 10 years of experience OR PhD with a minimum of 8 years of experience.
  • Minimum of 10 years of experience in developing board level hardware and systems.
  • Proven success in taking HW systems from concept to production.
  • Experience in system architecture, SI/PI, power, BM, high speed interfaces.
  • Experience with schematic capture software.
  • Strong technical domain expertise in Electrical Engineering principles, concepts, methods, and global standards compliance.

Nice to have

  • Familiarity with volume manufacturing methods and processes.

Skills: board level hardware, system architecture, SI/PI, high speed interfaces, schematic capture

Market context

This role has been open 82 days — well above the 58-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · SOC Architecture

Open roles in category
103
Median days open
58 d
Median salary
$208k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Cadence Design Systems compares in Hardware Systems Engineering hiring
Metric Cadence Design Systems All employers we track in this specialty (103 roles · 28 employers)
Open roles in this specialty 2 103
Open roles in the wider Software, Firmware & Systems family 136 6118 · 145 employers
Median days open 91 d 58 d (+33 d vs this employer)
Median salary (USD postings) — $208k

Skills observed across this category: board level hardware, system architecture, SI/PI, high speed interfaces, schematic capture

Who's hiring in this category

  • AMD · 28 open roles · median 58 d
  • Qualcomm · 21 open roles · median 46 d
  • NVIDIA · 16 open roles · median 77 d
  • Intel Corporation · 6 open roles · median 45 d
  • Mobileye · 4 open roles · median 25 d
  • Apple · 3 open roles · median 17 d

How we counted: 103 open Hardware Systems Engineering (SOC Architecture) roles from 28 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

Apply now
SAN JOSE, United States
On-site
$178,500 - $331,500 USD yearly
3 months ago

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