Sr Principal Engineer, NPU Architecture - Austin, United States
Originally posted 28 September 2026 by the employer.
About the role
This role defines and leads AI acceleration technologies for Automotive High Performance Compute (HPC) platforms, driving the architectural vision and technical roadmap for Neural Processing Units (NPUs).
What you'll do
- Define the long-term architectural vision and roadmap for Renesas AI acceleration technologies.
- Drive architectural decisions across tensor processing engines, vector processors, activation units, sparse computing architectures, and emerging AI compute paradigms.
- Define system-level architectures enabling efficient interaction between NPUs, CPUs, GPUs, DSPs, memory subsystems, and security domains.
- Architect high-bandwidth, low-latency memory hierarchies addressing modern AI workload requirements.
- Develop and lead architecture modeling frameworks using C++, SystemC, TLM, or equivalent modeling environments.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
- 15+ years of semiconductor architecture experience, including significant experience in AI accelerators, NPUs, GPUs, DSPs, or other high-performance compute architectures.
- Deep knowledge of AI/ML workloads including Convolutional Neural Networks (CNNs), Transformers, Large Language Models (LLMs), Generative AI, Computer Vision, and Multi-modal systems.
- Strong understanding of NPU architecture, Computer architecture, Memory hierarchy design, Cache coherency, Data movement optimization, and Hardware performance modeling.
- Expertise with AXI / ACE / CHI protocols, NoC architectures, SystemC/TLM, C++, and Performance simulation frameworks.
- Familiarity with LLVM, MLIR, ONNX, TensorFlow, PyTorch, and AI compiler technologies.
Nice to have
- Experience developing automotive AI or ADAS computing platforms.
- Experience with functional safety (ISO 26262) and safety-compliant architectures.
- Contributions to industry standards, patents, or publications.
Skills: NPU Architecture, AI acceleration, automotive inference, tensor processing engines, ISO 26262
This role has been open 1 day — well below the 71-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
501
|
Median days open
71 d
|
Median salary
$225k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (501 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 501 |
| Open roles in the wider Software, Firmware & Systems family | 125 | 5943 · 145 employers |
| Median days open | 28 d | 71 d (−43 d vs this employer) |
| Median salary (USD postings) | — | $225k |
Skills observed across this category: NPU Architecture, AI acceleration, automotive inference, tensor processing engines, ISO 26262
Who's hiring in this category
- Qualcomm · 106 open roles · median 104 d
- NVIDIA · 81 open roles · median 67 d
- AMD · 42 open roles · median 64 d
- Micron Technology · 29 open roles · median 54 d
- Mobileye · 20 open roles · median 67 d
- Analog Devices · 14 open roles · median 33 d
How we counted: 501 open AI/ML Hardware Engineering (AI ML Hardware) roles from 76 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.