Sr. Principal DFT Engineer (AI2533) - San Jose, California, United States
$231,100 - $358,200 USD yearly
Originally posted 18 August 2026 by the employer.
About the role
As Sr. Principal DFT Engineer, you will provide technical leadership across various DFT endeavors and develop DFT architecture and methodology for industrial, robotic, and automotive ICs.
What you'll do
- Provide technical leadership across various DFT endeavors at SiMa.
- Develop DFT architecture and methodology for industrial, robotic, and automotive ICs.
- Execute DFT architecture and methodology in future SiMa SoC(s).
- Work with DFT team members to enable their success.
- Collaborate across H/W functions (RTL design, verification, and physical design) for DFT strategies.
What you'll need
- BSEE with 18+ years of experience or MSEE/PhD with 16+ years of experience.
- Commanding knowledge of all aspects of DFT.
- Experience with end-to-end DFT execution from architecture to tape-out to pattern bringup across multiple ICs in advanced finFET technology.
- In-depth knowledge of VLSI design.
- Hands-on experience with Verilog and System Verilog.
- Hands-on experience with EDA tools like Synopsys SMS/Testmax or Mentor Tessent.
Nice to have
- Working knowledge of non-DFT EDA tools like VCS/Verdi, Fusion Compiler, PrimeTime, PrimePower, RedHawk, StarRC.
This role has been open 55 days — below the 57-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
243
|
Median days open
57 d
|
Median salary
$203k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | SiMa.ai | All employers we track in this specialty (243 roles · 53 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 243 |
| Open roles in the wider Digital Design & Verification family | 12 | 3183 · 115 employers |
| Median days open | 55 d | 57 d (−2 d vs this employer) |
| Median salary (USD postings) | — | $203k |
Who's hiring in this category
- AMD · 39 open roles · median 42 d
- NVIDIA · 24 open roles · median 38 d
- Qualcomm · 24 open roles · median 102 d
- NXP Semiconductors · 18 open roles · median 64 d
- Synopsys · 13 open roles · median 24 d
- Micron Technology · 10 open roles · median 63 d
How we counted: 243 open DFT Engineering (DFT Test) roles from 53 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.