Skip to main content
Cadence Design Systems

Sr. Principal Design Engineer - Hyderabad, India

Cadence Design Systems HYDERABAD, India 5 months ago
Analog & Mixed-Signal Design

Originally posted 30 April 2026 by the employer — open 133 days. Relisted by the employer on 11 August 2026.

This role focuses on SRAM macros, sense amplifiers, and self-timed circuits.

About the role

This role is for an SRAM Circuit Design Engineer specializing in the development of circuits and SRAM/Register File for low power, low voltage and high performance.

What you'll do

  • Build full-custom or compiler-based SRAM macros, sense amplifiers, and self-timed circuits.
  • Run SPICE simulations to analyze timing, power, and Static Noise Margin (SNM) across process corners.
  • Direct physical design and layout teams to handle process variability and FinFET manufacturing rules.
  • Support post-silicon testing and troubleshooting hardware failures.

What you'll need

  • B.Tech/M.Tech in Electrical Engineering, VLSI, or Microelectronics.
  • 6 to 18 years of experience in semiconductor engineering.
  • Deep understanding of CMOS device physics, transistor sizing, and memory cell stability.
  • Proficiency in EDA software like Cadence Virtuoso or SPICE simulators.
  • Ability to use Python or Perl for workflow automation and data analysis.

Skills: high-speed analog/mixed-signal circuits, Die-to-Die, chiplet-based systems, UCIe-compliant interfaces, advanced packaging technologies, silicon bring-up

Market context

This role has been open 165 days — well above the 79-day median for Mixed-Signal Design roles.

Mixed-Signal Design · Mixed Signal

Open roles in category
173
Median days open
79 d
Median salary
$178k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Cadence Design Systems compares in Mixed-Signal Design hiring
Metric Cadence Design Systems All employers we track in this specialty (173 roles · 44 employers)
Open roles in category 5 173
Median days open 162 d 79 d (+83 d vs this employer)
Median salary (USD postings) — $178k

Skills observed across this category: high-speed analog/mixed-signal circuits, Die-to-Die, chiplet-based systems, UCIe-compliant interfaces, advanced packaging technologies, silicon bring-up

Who's hiring in this category

  • Analog Devices · 25 open roles · median 117 d
  • Infineon Technologies · 14 open roles · median 71 d
  • NVIDIA · 12 open roles · median 51 d
  • SiTime · 11 open roles · median 169 d
  • Qualcomm · 10 open roles · median 55 d
  • Microchip Technology · 8 open roles · median 168 d

How we counted: 173 open Mixed-Signal Design (Mixed Signal) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Apply now
HYDERABAD, India
On-site
5 months ago

Share this job