Sr. Physical Design Engineer - San Jose, United States
Originally posted 10 July 2026 by the employer.
Lumilens is developing high-performance ASICs using TSMC advanced process nodes, including 5nm and 3nm.
About the role
This role involves owning physical implementation from RTL to GDSII and driving timing and power closure for ultra-high-speed designs. You will work on advanced TSMC process nodes, including 5nm and 3nm.
What you'll do
- Own full-chip and block-level physical implementation, including floorplanning, placement, CTS, routing, and physical verification for high-speed designs.
- Collaborate with RTL and STA teams to ensure convergent timing, area, and power closure.
- Apply physical design techniques for multi-voltage and multi-frequency domains, hierarchical implementation, and congestion mitigation.
- Perform tapeout signoff activities, including PV, EM/IR, ESD and ejobview using industry-standard verification tools.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or a related field.
- 8+ years of hands-on physical design experience with advanced technology nodes at 5nm or below.
- Strong experience with floorplanning, placement, CTS, routing, IR drop mitigation, timing closure, and signoff debugging.
- Hands-on experience with tools such as Synopsys ICC2, RedHawk SC, Cadence Innovus, Voltus, Simens Calibre.
- Strong scripting skills in Tcl, Python, or Perl.
Nice to have
- Experience with high-speed PHY such as SerDes, UCIe physical design implementation.
- Familiarity with EM/IR analysis, power grid optimization, congestion analysis, physical verification, and tapeout signoff in advanced semiconductor process nodes.
- Experience supporting high-frequency datapath or DSP-heavy designs.
- Experience with TSMC CoWoS or SoIC-X design.
Skills: floorplanning, placement, CTS, routing, physical verification, tapeout
This role has been open 73 days — well above the 60-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
659
|
Median days open
60 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Lumilens | All employers we track in this specialty (659 roles · 80 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 659 |
| Open roles in the wider Physical Implementation family | 3 | 1441 · 110 employers |
| Median days open | 73 d | 60 d (+13 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: floorplanning, placement, CTS, routing, physical verification, tapeout
Who's hiring in this category
- Qualcomm · 119 open roles · median 45 d
- AMD · 63 open roles · median 24 d
- NVIDIA · 37 open roles · median 72 d
- Synopsys · 37 open roles · median 32 d
- Intel Corporation · 36 open roles · median 11 d
- Broadcom · 30 open roles · median 97 d
How we counted: 659 open Physical Design (Physical Design) roles from 80 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.